From 6912846dda39e5c81993a64832301e78492ec254 Mon Sep 17 00:00:00 2001 From: Dan Lykowski Date: Thu, 15 Jan 2009 02:35:30 +0000 Subject: [PATCH] Adds a retry/faildown to SB600 SATA detection logic. SATA port status kept returning 0x1: BAR5+po+28h 1h = Device presence detected but Phy communication not established This patch adds logic to force 1.5g if the drive fails to communicate at 3.0g. Signed-off-by: Dan Lykowski Acked-by: Peter Stuge git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3864 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/amd/sb600/sb600_sata.c | 29 ++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/src/southbridge/amd/sb600/sb600_sata.c b/src/southbridge/amd/sb600/sb600_sata.c index 970af07512..933f59936e 100644 --- a/src/southbridge/amd/sb600/sb600_sata.c +++ b/src/southbridge/amd/sb600/sb600_sata.c @@ -175,6 +175,35 @@ static void sata_init(struct device *dev) byte = readb(sata_bar5 + 0x128 + 0x80 * i); printk_spew("SATA port %i status = %x\n", i, byte); byte &= 0xF; + + if( byte == 0x1 ) { + /* If the drive status is 0x1 then we see it but we aren't talking to it. */ + /* Try to do something about it. */ + printk_spew("SATA device detected but not talking. Trying lower speed.\n"); + + /* Read in Port-N Serial ATA Control Register */ + byte = readb(sata_bar5 + 0x12C + 0x80 * i); + + /* Set Reset Bit and 1.5g bit */ + byte |= 0x11; + writeb(byte, (sata_bar5 + 0x12C + 0x80 * i)); + + /* Wait 1ms */ + mdelay(1); + + /* Clear Reset Bit */ + byte &= ~0x01; + writeb(byte, (sata_bar5 + 0x12C + 0x80 * i)); + + /* Wait 1ms */ + mdelay(1); + + /* Reread status */ + byte = readb(sata_bar5 + 0x128 + 0x80 * i); + printk_spew("SATA port %i status = %x\n", i, byte); + byte &= 0xF; + } + if (byte == 0x3) { for (j = 0; j < 10; j++) { if (!sata_drive_detect(i, ((i / 2) == 0) ? sata_bar0 : sata_bar2))