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mb/google/hatch: Kohaku: Add touchscreen controller to device tree 

The touchscreen controller was never added to the device tree, and the
next board rev will have this IC connected.  Set it up in the device tree
with conservative power resource timings from the datasheet.

BUG=b:138869702
BRANCH=none
TEST=compiles; current board rev does not have touch IC

Change-Id: I759fb32f31c8eee0e6bd664c6a82308354ef5d08
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34763
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Tim Wawrzynczak 2019-08-07 11:08:07 -06:00 committed by Shelley Chen
parent 042e46f6c8
commit 69254494a0
2 changed files with 19 additions and 0 deletions
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4
src/mainboard/google/hatch/variants/kohaku/gpio.c
View File

@ -41,10 +41,14 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_C1, NONE), PAD_NC(GPP_C1, NONE),
/* C7 : PEN_IRQ_OD_L */ /* C7 : PEN_IRQ_OD_L */
PAD_CFG_GPI_APIC(GPP_C7, NONE, PLTRST, LEVEL, INVERT), PAD_CFG_GPI_APIC(GPP_C7, NONE, PLTRST, LEVEL, INVERT),
/* C12 : EN_PP3300_TSP_DX */
PAD_CFG_GPO(GPP_C12, 0, DEEP),
/* C15 : EN_PP3300_DIG_DX */ /* C15 : EN_PP3300_DIG_DX */
PAD_CFG_GPO(GPP_C15, 0, DEEP), PAD_CFG_GPO(GPP_C15, 0, DEEP),
/* C23 : UART2_CTS# ==> NC */ /* C23 : UART2_CTS# ==> NC */
PAD_NC(GPP_C23, NONE), PAD_NC(GPP_C23, NONE),
/* D16 : TOUCHSCREEN_INT_L */
PAD_CFG_GPI_APIC(GPP_D16, NONE, PLTRST, LEVEL, INVERT),
/* E23 : GPP_E23 ==> NC */ /* E23 : GPP_E23 ==> NC */
PAD_NC(GPP_E23, NONE), PAD_NC(GPP_E23, NONE),
/* F1 : GPP_F1 ==> NC */ /* F1 : GPP_F1 ==> NC */

15
src/mainboard/google/hatch/variants/kohaku/overridetree.cb
View File

@ -81,6 +81,21 @@ chip soc/intel/cannonlake
end end
end # I2C 0 end # I2C 0
device pci 15.1 on
chip drivers/i2c/generic
register "hid" = ""ATML0001""
register "desc" = ""Atmel Touchscreen""
register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D16_IRQ)"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)"
register "reset_delay_ms" = "91" # 90.5 ms
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C12)"
register "enable_delay_ms" = "1" # 90 ns
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 4b on end
end
end # I2C #1
device pci 15.2 on device pci 15.2 on
chip drivers/i2c/hid chip drivers/i2c/hid
register "generic.hid" = ""WCOM50C1"" register "generic.hid" = ""WCOM50C1""