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mb/google/asurada: Fixup BOOT_DEVICE_SPI_FLASH_BUS default value 

On MT8192 the SPI flash is actually using a SPI-NOR controller with
its own bus. The number here should be a virtual value as
(SPI_BUS_NUMBER + 1).

Signed-off-by: CK Hu <ck.hu@mediatek.com>
Change-Id: Ibc269201a34968c8400d2235e8da2ecd88114975
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44452
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
CK Hu 2020-08-13 14:49:10 +08:00 committed by Hung-Te Lin
parent 9bc041187d
commit 693f4a4179
1 changed files with 3 additions and 1 deletions
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4
src/mainboard/google/asurada/Kconfig
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@ -41,9 +41,11 @@ config DRIVER_TPM_SPI_BUS
hex
default 0x0
# On MT8192 the SPI flash is actually using a SPI-NOR controller with its own bus.
# The number here should be a virtual value as (SPI_BUS_NUMBER + 1).
config BOOT_DEVICE_SPI_FLASH_BUS
int
default 1
default 9
config EC_GOOGLE_CHROMEEC_SPI_BUS
hex