src/drivers: Clean up includes
Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: Ia40678019b2a54deb246dbfbf33ec37a8c3839e4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68206 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <stdint.h>
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void intel_gmbus_read_edid(u8 *gmbus_mmio, u8 bus, u8 slave, u8 *edid, u32 edid_size);
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void intel_gmbus_stop(u8 *gmbus_mmio);
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#include <console/console.h>
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#include <delay.h>
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#include <mipi/panel.h>
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#include <types.h>
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enum cb_err mipi_panel_parse_init_commands(const void *buf, mipi_cmd_func_t cmd_func)
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{
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#include <arch/io.h>
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#include <pc80/i8259.h>
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#include <console/console.h>
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#include <stdint.h>
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/* Read the current PIC IRQ mask */
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u16 pic_read_irq_mask(void)
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <stdint.h>
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#include <console/console.h>
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#include <pc80/mc146818rtc.h>
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#include <fallback.h>
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#include <pc80/mc146818rtc.h>
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#include <stdint.h>
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#if CONFIG_MAX_REBOOT_CNT > 15
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#error "CONFIG_MAX_REBOOT_CNT too high"
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#include <console/console.h>
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#include <delay.h>
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#include <spi_bitbang.h>
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#include <types.h>
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/* Set to 1 to dump all SPI transfers to the UART. */
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#define TRACE 0
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#include <arch/io.h>
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#include <boot/coreboot_tables.h>
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#include <commonlib/bsd/helpers.h>
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#include <console/uart.h>
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#include <stdint.h>
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#include "uart8250reg.h"
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/* Should support 8250, 16450, 16550, 16550A type UARTs */
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