pcengines/apu2: enable IOMMU for all apu2 variants
IOMMU was tested on Xen 4.8 and Linux kernel 4.14.33. Following feature set is enabled: (XEN) AMD-Vi: Disabled HAP memory map sharing with IOMMU (XEN) AMD-Vi: IOMMU Extended Features: (XEN) - Peripheral Page Service Request (XEN) - Guest Translation (XEN) - Invalidate All Command (XEN) - Guest APIC supported (XEN) - Performance Counters (XEN) AMD-Vi: IOMMU 0 Enabled. Change-Id: I6dbfae78849248f3532caa78974c8f2ce61a530d Signed-off-by: Piotr Król <piotr.krol@3mdeb.com> Reviewed-on: https://review.coreboot.org/26116 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Alexander Couzens <lynxis@fe80.eu> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -25,7 +25,7 @@ chip northbridge/amd/pi/00730F01/root_complex
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chip northbridge/amd/pi/00730F01 # PCI side of HT root complex
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device pci 0.0 on end # Root Complex
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device pci 0.2 off end # IOMMU
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device pci 0.2 on end # IOMMU
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device pci 1.0 off end # Internal Graphics P2P bridge 0x9804
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device pci 1.1 off end # Internal Multimedia
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device pci 2.0 on end # PCIe Host Bridge
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@ -25,7 +25,7 @@ chip northbridge/amd/pi/00730F01/root_complex
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chip northbridge/amd/pi/00730F01 # PCI side of HT root complex
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device pci 0.0 on end # Root Complex
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device pci 0.2 off end # IOMMU
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device pci 0.2 on end # IOMMU
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device pci 1.0 off end # Internal Graphics P2P bridge 0x9804
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device pci 1.1 off end # Internal Multimedia
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device pci 2.0 on end # PCIe Host Bridge
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@ -25,7 +25,7 @@ chip northbridge/amd/pi/00730F01/root_complex
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chip northbridge/amd/pi/00730F01 # PCI side of HT root complex
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device pci 0.0 on end # Root Complex
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device pci 0.2 off end # IOMMU
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device pci 0.2 on end # IOMMU
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device pci 1.0 off end # Internal Graphics P2P bridge 0x9804
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device pci 1.1 off end # Internal Multimedia
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device pci 2.0 on end # PCIe Host Bridge
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@ -25,7 +25,7 @@ chip northbridge/amd/pi/00730F01/root_complex
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chip northbridge/amd/pi/00730F01 # PCI side of HT root complex
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device pci 0.0 on end # Root Complex
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device pci 0.2 off end # IOMMU
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device pci 0.2 on end # IOMMU
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device pci 1.0 off end # Internal Graphics P2P bridge 0x9804
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device pci 1.1 off end # Internal Multimedia
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device pci 2.0 on end # PCIe Host Bridge
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