vc/amd/sb800: SBCMN: Cast to 32-bit before shift

SB800: sb_Before_Pci_Init
    shift out of bounds src/vendorcode/amd/cimx/sb800/SBCMN.c:486:57
    ubsan: unrecoverable error.

Found-by: UBSAN
Change-Id: Id05b96f1f4cf4a1cf8283db22e10ab8df833406d
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51286
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Paul Menzel 2021-03-05 01:24:41 +01:00 committed by Patrick Georgi
parent 9c7122f1e8
commit 69569e5306
1 changed files with 6 additions and 6 deletions

View File

@ -417,9 +417,9 @@ commonInitEarlyBoot (
abLinkInitBeforePciEnum (pConfig); // Set ABCFG registers
// AB MSI
if ( pConfig->BuildParameters.AbMsi) {
abValue = readAlink (SB_ABCFG_REG94 | (UINT32) (ABCFG << 29));
abValue = readAlink (SB_ABCFG_REG94 | ((UINT32) ABCFG << 29));
abValue = abValue | BIT20;
writeAlink (SB_ABCFG_REG94 | (UINT32) (ABCFG << 29), abValue);
writeAlink (SB_ABCFG_REG94 | ((UINT32) ABCFG << 29), abValue);
}
@ -483,12 +483,12 @@ abSpecialSetBeforePciEnum (
)
{
UINT32 abValue;
abValue = readAlink (SB_ABCFG_REGC0 | (UINT32) (ABCFG << 29));
abValue = readAlink (SB_ABCFG_REGC0 | ((UINT32) ABCFG << 29));
abValue &= 0xf0;
if ( pConfig->SbPcieOrderRule && abValue ) {
abValue = readAlink (SB_RCINDXC_REG02 | (UINT32) (RCINDXC << 29));
abValue = readAlink (SB_RCINDXC_REG02 | ((UINT32) RCINDXC << 29));
abValue = abValue | BIT9;
writeAlink (SB_RCINDXC_REG02 | (UINT32) (RCINDXC << 29), abValue);
writeAlink (SB_RCINDXC_REG02 | ((UINT32) RCINDXC << 29), abValue);
}
}
@ -620,7 +620,7 @@ abLinkInitBeforePciEnum (
pAbTblPtr = (ABTBLENTRY *) FIXUP_PTR (&abTblEntry800[0]);
abcfgTbl (pAbTblPtr);
if ( cimResetCpuOnSyncFlood ) {
rwAlink (SB_ABCFG_REG10050 | (UINT32) (ABCFG << 29), ~BIT2, BIT2);
rwAlink (SB_ABCFG_REG10050 | ((UINT32) ABCFG << 29), ~BIT2, BIT2);
}
}