diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index 22d0c3ac61..afee1efd70 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -26,6 +26,10 @@ config SOC_SPECIFIC_OPTIONS
 	select SOC_AMD_COMMON_BLOCK_SMI
 	select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
 
+config CHIPSET_DEVICETREE
+	string
+	default "soc/amd/cezanne/chipset.cb"
+
 config EARLY_RESERVED_DRAM_BASE
 	hex
 	default 0x2000000
diff --git a/src/soc/amd/cezanne/chipset.cb b/src/soc/amd/cezanne/chipset.cb
new file mode 100644
index 0000000000..49bd0c8b18
--- /dev/null
+++ b/src/soc/amd/cezanne/chipset.cb
@@ -0,0 +1,5 @@
+chip soc/amd/cezanne
+	device domain 0 on
+		device pci 00.0 alias gnb on end
+	end
+end