amd/gardenia: Enable LPC decodes

Turn on LPC decoding in romstage.

Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Original-Reviewed-by: Marc Jones <marcj303@gmail.com>
(cherry picked from commit 5d9dae5a1fdab1bf6c418dc7e6de28069bd342dc)

Change-Id: I937eb5c5b6c6a9f7a13ebd0bec7fcc8d789427ce
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/17227
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Marshall Dawson 2016-10-11 14:19:07 -04:00 committed by Martin Roth
parent ce128a7ef1
commit 698b3876cc
1 changed files with 2 additions and 2 deletions

View File

@ -1,7 +1,7 @@
/* /*
* This file is part of the coreboot project. * This file is part of the coreboot project.
* *
* Copyright (C) 2015 Advanced Micro Devices, Inc. * Copyright (C) 2015-2016 Advanced Micro Devices, Inc.
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@ -33,8 +33,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
#endif #endif
amd_initmmio(); amd_initmmio();
hudson_lpc_port80(); hudson_lpc_port80();
hudson_lpc_decode();
if (!cpu_init_detectedx && boot_cpu()) { if (!cpu_init_detectedx && boot_cpu()) {
post_code(0x30); post_code(0x30);