Mistral: Enable USB in romstage

Enable USB support for mistral in romstage.

TEST=build & run

Change-Id: I5c2bbe16aa3601e014a2b77d192565402ed23794
Signed-off-by: Nitheesh Sekar <nsekar@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32063
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Nitheesh Sekar 2019-03-27 13:14:02 +05:30 committed by Patrick Georgi
parent dd3cffdb0c
commit 69cc491c3f
3 changed files with 48 additions and 0 deletions

View File

@ -11,6 +11,7 @@ verstage-y += reset.c
romstage-y += memlayout.ld
romstage-y += chromeos.c
romstage-y += reset.c
romstage-y += romstage.c
ramstage-y += memlayout.ld
ramstage-y += chromeos.c

View File

@ -17,6 +17,20 @@
#include <bootblock_common.h>
#include <timestamp.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <soc/usb.h>
static struct usb_board_data usb1_board_data = {
.parameter_override_x0 = 0x63,
.parameter_override_x1 = 0x03,
.parameter_override_x0 = 0x1d,
.parameter_override_x1 = 0x03,
};
static void setup_usb(void)
{
/* Setting Secondary usb controller */
setup_usb_host(HSUSB_HS_PORT_1, &usb1_board_data);
}
static void mainboard_init(struct device *dev)
{
@ -24,6 +38,8 @@ static void mainboard_init(struct device *dev)
/* Copy WIFI calibration data into CBMEM. */
cbmem_add_vpd_calibration_data();
}
setup_usb();
}
static void mainboard_enable(struct device *dev)

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@ -0,0 +1,31 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/stages.h>
#include <soc/usb.h>
static void prepare_usb(void)
{
/*
* Do DWC3 core and phy reset. Kick these resets off early
* so they get atleast 1msec to settle.
*/
reset_usb(HSUSB_HS_PORT_1);
}
void platform_romstage_main(void)
{
prepare_usb();
}