mb/emulation/qemu-i440fx|q35: Link memory.c
Link memory.c instead of including it. Change-Id: I2bc461b13332ec5885c33c87828a5fd023f8e730 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/29574 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@ -1,3 +1,5 @@
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cpu_incs-y += $(src)/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
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ramstage-y += northbridge.c
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ramstage-y += fw_cfg.c
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romstage-y += memory.c
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ramstage-y += memory.c
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@ -14,6 +14,8 @@
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*/
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#include <cbmem.h>
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#include <arch/io.h>
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#include "memory.h"
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#define CMOS_ADDR_PORT 0x70
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#define CMOS_DATA_PORT 0x71
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@ -25,12 +27,24 @@
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#define MID_HIGHRAM_ADDR 0x5c
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#define LOW_HIGHRAM_ADDR 0x5b
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static unsigned long qemu_get_memory_size(void)
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unsigned long qemu_get_high_memory_size(void)
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{
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unsigned long high;
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outb(HIGH_HIGHRAM_ADDR, CMOS_ADDR_PORT);
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high = ((unsigned long) inb(CMOS_DATA_PORT)) << 22;
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outb(MID_HIGHRAM_ADDR, CMOS_ADDR_PORT);
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high |= ((unsigned long) inb(CMOS_DATA_PORT)) << 14;
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outb(LOW_HIGHRAM_ADDR, CMOS_ADDR_PORT);
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high |= ((unsigned long) inb(CMOS_DATA_PORT)) << 6;
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return high;
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}
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unsigned long qemu_get_memory_size(void)
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{
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unsigned long tomk;
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outb (HIGH_RAM_ADDR, CMOS_ADDR_PORT);
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outb(HIGH_RAM_ADDR, CMOS_ADDR_PORT);
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tomk = ((unsigned long) inb(CMOS_DATA_PORT)) << 14;
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outb (LOW_RAM_ADDR, CMOS_ADDR_PORT);
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outb(LOW_RAM_ADDR, CMOS_ADDR_PORT);
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tomk |= ((unsigned long) inb(CMOS_DATA_PORT)) << 6;
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tomk += 16 * 1024;
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return tomk;
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@ -0,0 +1,24 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2004 Stefan Reinauer <stefan.reinauer@coreboot.org>
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* Copyright (C) 2018 Patrick Rudolph <siro@das-labor.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __QEMU_MEMORY_H_
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#define __QEMU_MEMORY_H_
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unsigned long qemu_get_high_memory_size(void);
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unsigned long qemu_get_memory_size(void);
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#endif
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@ -23,26 +23,13 @@
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#include <string.h>
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#include <delay.h>
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#include <smbios.h>
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#include <cbmem.h>
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#include "memory.h"
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#include "fw_cfg.h"
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#include "fw_cfg_if.h"
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#include "memory.c"
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#include "acpi.h"
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static unsigned long qemu_get_high_memory_size(void)
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{
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unsigned long high;
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outb (HIGH_HIGHRAM_ADDR, CMOS_ADDR_PORT);
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high = ((unsigned long) inb(CMOS_DATA_PORT)) << 22;
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outb (MID_HIGHRAM_ADDR, CMOS_ADDR_PORT);
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high |= ((unsigned long) inb(CMOS_DATA_PORT)) << 14;
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outb (LOW_HIGHRAM_ADDR, CMOS_ADDR_PORT);
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high |= ((unsigned long) inb(CMOS_DATA_PORT)) << 6;
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return high;
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}
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static void qemu_reserve_ports(struct device *dev, unsigned int idx,
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unsigned int base, unsigned int size,
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const char *name)
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@ -18,6 +18,7 @@
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#include <device/pci_ids.h>
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#include <arch/io.h>
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#include <device/pnp_def.h>
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#include <cbmem.h>
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#include <console/console.h>
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#include <cpu/x86/bist.h>
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#include <cpu/intel/romstage.h>
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#include <delay.h>
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#include <cpu/x86/lapic.h>
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#include "memory.c"
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void *asmlinkage romstage_main(unsigned long bist)
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{
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@ -1,3 +1,5 @@
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cpu_incs-y += $(src)/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
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ramstage-y += ../qemu-i440fx/northbridge.c
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ramstage-y += ../qemu-i440fx/memory.c
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ramstage-y += ../qemu-i440fx/fw_cfg.c
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romstage-y += ../qemu-i440fx/memory.c
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@ -19,6 +19,7 @@
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#include <arch/io.h>
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#include <device/pnp_def.h>
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#include <pc80/mc146818rtc.h>
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#include <cbmem.h>
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#include <console/console.h>
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#include <southbridge/intel/i82801ix/i82801ix.h>
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#include <cpu/x86/bist.h>
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#include <delay.h>
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#include <cpu/x86/lapic.h>
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#include "../qemu-i440fx/memory.c"
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void * asmlinkage romstage_main(unsigned long bist)
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{
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