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mb/google/kukui: Add Micron 4GB discrete LPDDR4X DDR support 

Support 4G+128G MT29VZZZAD9GQFSM-046 W.9S9 discrete DDR bootup.

BUG=b:162292216
BRANCH=kukui
TEST=Boots correctly on Kukui.

Signed-off-by: Jessy Jiang <jiangchao5@huaqin.corp-partner.google.com>
Change-Id: I5657a007154bc52c6f0f27e1de6e3294a5e74ad7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48686
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Jessy Jiang 2021-03-02 16:56:07 +08:00 committed by Hung-Te Lin
parent 30c5e607b3
commit 69da754112
3 changed files with 29 additions and 0 deletions
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1
src/mainboard/google/kukui/sdram_configs.c
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@ -23,6 +23,7 @@ static const char *const sdram_configs[] = {
[0x08] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB", [0x08] = "sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB",
[0x09] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB", [0x09] = "sdram-lpddr4x-MT53E2G32D4NQ-046-8GB",
[0x0a] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB", [0x0a] = "sdram-lpddr4x-H9HCNNNCPMMLXR-NEE-4GB",
[0x0b] = "sdram-lpddr4x-MT29VZZZAD9GQFSM-046-4GB",
/* Table shared by Burnet and its variants, Fennel and Cerise, offset = 0x10 */ /* Table shared by Burnet and its variants, Fennel and Cerise, offset = 0x10 */
[0x10] = "sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB", [0x10] = "sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB",

1
src/mainboard/google/kukui/sdram_params/Makefile.inc
View File

@ -13,6 +13,7 @@ sdram-params += sdram-lpddr4x-SDADA4CR-128G-4GB
sdram-params += sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-8GB sdram-params += sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-8GB
sdram-params += sdram-lpddr4x-MT53E1G32D2NP-046-4GB sdram-params += sdram-lpddr4x-MT53E1G32D2NP-046-4GB
sdram-params += sdram-lpddr4x-MT29VZZZCD9GQKPR-046-8GB sdram-params += sdram-lpddr4x-MT29VZZZCD9GQKPR-046-8GB
sdram-params += sdram-lpddr4x-MT29VZZZAD9GQFSM-046-4GB
$(foreach params,$(sdram-params), \ $(foreach params,$(sdram-params), \
$(eval cbfs-files-y += $(params)) \ $(eval cbfs-files-y += $(params)) \

27
src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT29VZZZAD9GQFSM-046-4GB.c Normal file
View File

@ -0,0 +1,27 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <soc/dramc_param.h>
struct sdram_params params = {
.source = DRAMC_PARAM_SOURCE_SDRAM_CONFIG,
.ddr_geometry = DDR_TYPE_2CH_1RK_4GB_4,
.frequency = 1600,
.wr_level = {
[CHANNEL_A] = { {0x21, 0x21}, {0x20, 0x20} },
[CHANNEL_B] = { {0x21, 0x28}, {0x21, 0x29} }
},
.cbt_cs_dly = {
[CHANNEL_A] = {0x2, 0x2},
[CHANNEL_B] = {0x2, 0x2}
},
.cbt_final_vref = {
[CHANNEL_A] = {0x5E, 0x5E},
[CHANNEL_B] = {0x5E, 0x5C}
},
.emi_cona_val = 0xF053F154,
.emi_conh_val = 0x44440003,
.emi_conf_val = 0x00421000,
.chn_emi_cona_val = {0x0444F051, 0x0444F051},
.cbt_mode_extern = CBT_NORMAL_MODE,
.delay_cell_unit = 868,
};