soc/amd/common/block/acpimmio: Add fch_disable_legacy_dma_io
Add a method to disable decoding the legacy DMA IO ports. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I979445cfa8317334e62e9ebf12256ece9f8058bf Reviewed-on: https://review.coreboot.org/c/coreboot/+/51075 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -69,6 +69,12 @@ void fch_enable_legacy_io(void)
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pm_write32(PM_DECODE_EN, pm_read32(PM_DECODE_EN) | LEGACY_IO_EN);
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}
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void fch_disable_legacy_dma_io(void)
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{
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pm_write32(PM_DECODE_EN, pm_read32(PM_DECODE_EN) &
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~(LEGACY_DMA_IO_EN | LEGACY_DMA_IO_80_EN));
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}
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void fch_io_enable_legacy_io(void)
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{
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pm_io_write32(PM_DECODE_EN, pm_io_read32(PM_DECODE_EN) | LEGACY_IO_EN);
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@ -22,6 +22,8 @@
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#define HPET_EN (1 << 6) /* decode HPET MMIO at 0xfed00000 */
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#define FCH_IOAPIC_EN (1 << 5)
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#define SMBUS_ASF_IO_EN (1 << 4)
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#define LEGACY_DMA_IO_80_EN (1 << 3) /* pass 0x80-0x83 to legacy DMA IO range */
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#define LEGACY_DMA_IO_EN (1 << 2)
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#define CF9_IO_EN (1 << 1)
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#define LEGACY_IO_EN (1 << 0)
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#define PM_RST_STATUS 0xc0
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@ -78,6 +80,7 @@ void enable_acpimmio_decode_pm24(void);
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void enable_acpimmio_decode_pm04(void);
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void fch_enable_cf9_io(void);
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void fch_enable_legacy_io(void);
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void fch_disable_legacy_dma_io(void);
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void fch_io_enable_legacy_io(void);
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void fch_enable_ioapic_decode(void);
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void fch_configure_hpet(void);
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