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coreboot-kgpe-d16
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Rename __attribute__((packed)) --> __packed 

Also unify __attribute__ ((..)) to __attribute__((..)) and
handle ((__packed__)) like ((packed))

Change-Id: Ie60a51c3fa92b5009724a5b7c2932e361bf3490c
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/15921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Stefan Reinauer 2017-07-13 02:20:27 +02:00
parent 9f244a5494
commit 6a00113de8
229 changed files with 1020 additions and 704 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/cbfs.txt
View File

@ -152,7 +152,7 @@ struct cbfs_header {
u32 offset;
u32 architecture;
u32 pad[1];
} __attribute__((packed));
} __packed;
The meaning of each member is as follows:

6
Documentation/timestamp.md
View File

@ -65,7 +65,7 @@ After such a transition, timestamp_init() must not be run again.
Data structures used
====================
The main structure that maintains information about the timestamp cache is:
struct __attribute__((__packed__)) timestamp_cache {
struct __packed timestamp_cache {
uint16_t cache_state;
struct timestamp_table table;
struct timestamp_entry entries[MAX_TIMESTAMP_CACHE];
@ -109,7 +109,7 @@ struct timestamp_table {
uint32_t max_entries;
uint32_t num_entries;
struct timestamp_entry entries[0]; /* Variable number of entries */
} __attribute__((packed));
} __packed;
It indicates the base time for all timestamp entries, maximum number
of entries that can be stored, total number of entries that currently
@ -125,7 +125,7 @@ defined by:
struct timestamp_entry {
uint32_t entry_id;
uint64_t entry_stamp;
} __attribute__((packed));
} __packed;
entry_id holds the timestamp id corresponding to this entry and
entry_stamp holds the actual timestamp.

2
payloads/coreinfo/bootlog_module.c
View File

@ -33,7 +33,7 @@ struct cbmem_console {
u32 size;
u32 cursor;
u8 body[0];
} __attribute__ ((__packed__));
} __packed;
#define CURSOR_MASK ((1 << 28) - 1)
#define OVERFLOW (1 << 31)

4
payloads/coreinfo/cbfs_module.c
View File

@ -44,7 +44,7 @@ struct cbheader {
u32 offset;
u32 architecture;
u32 pad[1];
} __attribute__ ((packed));
} __packed;
struct cbfile {
u64 magic;
@ -53,7 +53,7 @@ struct cbfile {
u32 checksum;
u32 offset;
char filename[0];
} __attribute__ ((packed));
} __packed;
static int filecount = 0, selected = 0, start_row = 0;
static char **filenames;

4
payloads/libpayload/arch/arm/gdb.c
View File

@ -22,10 +22,10 @@ struct gdb_regs
struct fp_reg
{
u8 byte[12];
} __attribute__((packed)) f[8];
} __packed f[8];
u32 fps;
u32 cpsr;
} __attribute__((packed));
} __packed;
static const u8 type_to_signal[] = {
[EXC_UNDEF] = GDB_SIGILL,

4
payloads/libpayload/arch/arm64/gdb.c
View File

@ -22,11 +22,11 @@ struct gdb_regs
struct fp_reg
{
u64 quad[2];
} __attribute__((packed)) f[32];
} __packed f[32];
u32 fpcr;
u32 fpsr;
u32 spsr;
} __attribute__((packed));
} __packed;
static const u8 type_to_signal[] = {
[EXC_SYNC_SP0] = GDB_SIGTRAP,

2
payloads/libpayload/drivers/cbmem_console.c
View File

@ -34,7 +34,7 @@ struct cbmem_console {
uint32_t size;
uint32_t cursor;
uint8_t body[0];
} __attribute__ ((__packed__));
} __packed;
#define CURSOR_MASK ((1 << 28) - 1)
#define OVERFLOW (1 << 31)

8
payloads/libpayload/drivers/usb/ehci_private.h
View File

@ -55,7 +55,7 @@ typedef volatile struct {
u32 hcsparams;
u32 hccparams;
u64 hcsp_portroute;
} __attribute__ ((packed)) hc_cap_t;
} __packed hc_cap_t;
typedef volatile struct {
u32 usbcmd;
@ -83,7 +83,7 @@ typedef volatile struct {
u8 res2[0x40];
u32 hostpc;
/* hostpc register is used for CONFIG_LP_USB_EHCI_HOSTPC_ROOT_HUB_TT */
} __attribute__ ((packed)) hc_op_t;
} __packed hc_op_t;
typedef volatile struct {
#define QTD_TERMINATE 1
@ -108,7 +108,7 @@ typedef volatile struct {
#define QTD_TOGGLE_DATA1 (1 << QTD_TOGGLE_SHIFT)
u32 bufptrs[5];
u32 bufptrs64[5];
} __attribute__ ((packed)) qtd_t;
} __packed qtd_t;
typedef volatile struct {
u32 horiz_link_ptr;
@ -132,7 +132,7 @@ typedef volatile struct {
#define QH_PIPE_MULTIPLIER_SHIFT 30
volatile u32 current_td_ptr;
volatile qtd_t td;
} __attribute__ ((packed)) ehci_qh_t;
} __packed ehci_qh_t;
typedef struct ehci {
hc_cap_t *capabilities;

8
payloads/libpayload/drivers/usb/ohci_private.h
View File

@ -186,7 +186,7 @@
_DO NOT_ use |= to set the bits,
this clears the entire state */
volatile u32 HcRhPortStatus[];
} __attribute__ ((packed)) opreg_t;
} __packed opreg_t;
typedef struct { /* should be 256 bytes according to spec */
u32 HccaInterruptTable[32];
@ -195,14 +195,14 @@
volatile u32 HccaDoneHead;
u8 reserved[116]; /* pad according to spec */
u8 what[4]; /* really pad to 256 as spec only covers 252 */
} __attribute__ ((packed)) hcca_t;
} __packed hcca_t;
typedef volatile struct {
u32 config;
u32 tail_pointer;
u32 head_pointer;
u32 next_ed;
} __attribute__ ((packed)) ed_t;
} __packed ed_t;
#define ED_HALTED 1
#define ED_TOGGLE 2
@ -220,7 +220,7 @@
u32 current_buffer_pointer;
u32 next_td;
u32 buffer_end;
} __attribute__ ((packed)) td_t;
} __packed td_t;
/*
* Bits 0 through 17 of .config won't be interpreted by the host controller
* (HC) and, after processing the TD, the HC has to ensure those bits have

4
payloads/libpayload/drivers/usb/uhci_private.h
View File

@ -67,13 +67,13 @@ typedef struct {
u32 bufptr;
} __attribute__ ((packed))
} __packed
td_t;
typedef struct {
flistp_t headlinkptr;
volatile flistp_t elementlinkptr;
} __attribute__ ((packed))
} __packed
qh_t;
typedef enum { USBCMD = 0, USBSTS = 2, USBINTR = 4, FRNUM =

8
payloads/libpayload/drivers/usb/usbmsc.c
View File

@ -112,14 +112,14 @@ typedef struct {
unsigned long bCBWCBLength:5;
unsigned long:3;
unsigned char CBWCB[31 - 15];
} __attribute__ ((packed)) cbw_t;
} __packed cbw_t;
typedef struct {
unsigned int dCSWSignature;
unsigned int dCSWTag;
unsigned int dCSWDataResidue;
unsigned char bCSWStatus;
} __attribute__ ((packed)) csw_t;
} __packed csw_t;
enum {
/*
@ -297,7 +297,7 @@ typedef struct {
unsigned char res2; //6
unsigned short numblocks; //7-8
unsigned char control; //9 - the block is 10 bytes long
} __attribute__ ((packed)) cmdblock_t;
} __packed cmdblock_t;
typedef struct {
unsigned char command; //0
@ -312,7 +312,7 @@ typedef struct {
unsigned char length; // for REQUEST SENSE
};
unsigned char control; //5
} __attribute__ ((packed)) cmdblock6_t;
} __packed cmdblock6_t;
/**
* Like readwrite_blocks, but for soft-sectors of 512b size. Converts the

32
payloads/libpayload/drivers/usb/xhci_private.h
View File

@ -165,7 +165,7 @@ typedef struct {
trb_t *ring;
trb_t *cur;
u8 pcs;
} __attribute__ ((packed)) transfer_ring_t;
} __packed transfer_ring_t;
#define COMMAND_RING_SIZE 4
typedef transfer_ring_t command_ring_t;
@ -332,8 +332,8 @@ typedef struct xhci {
struct {
u8 hciver_lo;
u8 hciver_hi;
} __attribute__ ((packed));
} __attribute__ ((packed));
} __packed;
} __packed;
union {
u32 hcsparams1;
struct {
@ -341,8 +341,8 @@ typedef struct xhci {
unsigned long MaxIntrs:11;
unsigned long:6;
unsigned long MaxPorts:8;
} __attribute__ ((packed));
} __attribute__ ((packed));
} __packed;
} __packed;
union {
u32 hcsparams2;
struct {
@ -352,16 +352,16 @@ typedef struct xhci {
unsigned long Max_Scratchpad_Bufs_Hi:5;
unsigned long SPR:1;
unsigned long Max_Scratchpad_Bufs_Lo:5;
} __attribute__ ((packed));
} __attribute__ ((packed));
} __packed;
} __packed;
union {
u32 hcsparams3;
struct {
unsigned long u1latency:8;
unsigned long:8;
unsigned long u2latency:16;
} __attribute__ ((packed));
} __attribute__ ((packed));
} __packed;
} __packed;
union {
u32 hccparams;
struct {
@ -376,11 +376,11 @@ typedef struct xhci {
unsigned long:4;
unsigned long MaxPSASize:4;
unsigned long xECP:16;
} __attribute__ ((packed));
} __attribute__ ((packed));
} __packed;
} __packed;
u32 dboff;
u32 rtsoff;
} __attribute__ ((packed)) *capreg;
} __packed *capreg;
/* opreg is R/W is most places, so volatile access is necessary.
volatile means that the compiler seeks byte writes if possible,
@ -446,8 +446,8 @@ typedef struct xhci {
u32 portpmsc;
u32 portli;
u32 res;
} __attribute__ ((packed)) prs[];
} __attribute__ ((packed)) *opreg;
} __packed prs[];
} __packed *opreg;
/* R/W, volatile, MMIO -> no bitfields */
volatile struct hcrreg {
@ -462,8 +462,8 @@ typedef struct xhci {
u32 erstba_hi;
u32 erdp_lo;
u32 erdp_hi;
} __attribute__ ((packed)) intrrs[]; // up to 1024, but maximum host specific, given in capreg->MaxIntrs
} __attribute__ ((packed)) *hcrreg;
} __packed intrrs[]; // up to 1024, but maximum host specific, given in capreg->MaxIntrs
} __packed *hcrreg;
/* R/W, volatile, MMIO -> no bitfields */
volatile u32 *dbreg;

6
payloads/libpayload/drivers/video/bitmap.h
View File

@ -37,7 +37,7 @@ struct bitmap_file_header {
uint32_t file_size;
uint16_t reserved[2];
uint32_t bitmap_offset;
} __attribute__ ((__packed__));
} __packed;
/* Bitmap version 3 */
@ -53,13 +53,13 @@ struct bitmap_header_v3 {
int32_t v_res;
uint32_t colors_used;
uint32_t colors_important;
} __attribute__ ((__packed__));
} __packed;
struct bitmap_palette_element_v3 {
uint8_t blue;
uint8_t green;
uint8_t red;
uint8_t reserved;
} __attribute__ ((__packed__));
} __packed;
#endif /* __BITMAP_H__ */

2
payloads/libpayload/include/arm/arch/exception.h
View File

@ -39,7 +39,7 @@ struct exception_state
{
u32 regs[16];
u32 cpsr;
} __attribute__((packed));
} __packed;
extern struct exception_state exception_state;
extern u32 exception_stack[];

2
payloads/libpayload/include/arm64/arch/exception.h
View File

@ -39,7 +39,7 @@ struct exception_state
uint64_t elr;
uint64_t esr;
uint64_t regs[31];
} __attribute__((packed));
} __packed;
extern struct exception_state *exception_state;

17
payloads/libpayload/include/cbfs_core.h
View File

@ -50,6 +50,7 @@
#include <stddef.h>
#include <stdint.h>
#include <stdlib.h>
#include <compiler.h>
/** These are standard values for the known compression
alogrithms that coreboot knows about for stages and
@ -97,7 +98,7 @@ struct cbfs_header {
uint32_t offset;
uint32_t architecture;
uint32_t pad[1];
} __attribute__((packed));
} __packed;
/* this used to be flexible, but wasn't ever set to something different. */
#define CBFS_ALIGNMENT 64
@ -134,7 +135,7 @@ struct cbfs_file {
uint32_t attributes_offset;
uint32_t offset;
char filename[];
} __attribute__((packed));
} __packed;
/* Depending on how the header was initialized, it may be backed with 0x00 or
* 0xff. Support both. */
@ -151,7 +152,7 @@ struct cbfs_file_attribute {
/* len covers the whole structure, incl. tag and len */
uint32_t len;
uint8_t data[0];
} __attribute__((packed));
} __packed;
struct cbfs_file_attr_compression {
uint32_t tag;
@ -159,7 +160,7 @@ struct cbfs_file_attr_compression {
/* whole file compression format. 0 if no compression. */
uint32_t compression;
uint32_t decompressed_size;
} __attribute__((packed));
} __packed;
struct cbfs_file_attr_hash {
uint32_t tag;
@ -167,7 +168,7 @@ struct cbfs_file_attr_hash {
uint32_t hash_type;
/* hash_data is len - sizeof(struct) bytes */
uint8_t hash_data[];
} __PACKED;
} __packed;
/*** Component sub-headers ***/
@ -183,7 +184,7 @@ struct cbfs_stage {
uint64_t load; /** Where to load in memory */
uint32_t len; /** length of data to load */
uint32_t memlen; /** total length of object in memory */
} __attribute__((packed));
} __packed;
/** this is the sub-header for payload components. Payloads
are loaded by coreboot at the end of the boot process */
@ -195,7 +196,7 @@ struct cbfs_payload_segment {
uint64_t load_addr;
uint32_t len;
uint32_t mem_len;
} __attribute__((packed));
} __packed;
struct cbfs_payload {
struct cbfs_payload_segment segments;
@ -210,7 +211,7 @@ struct cbfs_payload {
struct cbfs_optionrom {
uint32_t compression;
uint32_t len;
} __attribute__((packed));
} __packed;
#define CBFS_MEDIA_INVALID_MAP_ADDRESS ((void*)(0xffffffff))
#define CBFS_DEFAULT_MEDIA ((void*)(0x0))

28
payloads/libpayload/include/compiler.h Normal file
View File

@ -0,0 +1,28 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2017 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __COMPILER_H__
#define __COMPILER_H__
#if defined(__WIN32) || defined(__WIN64)
#define __packed __attribute__((gcc_struct, packed))
#else
#define __packed __attribute__((packed))
#endif
#define __aligned(x) __attribute__((aligned(x)))
#define __always_unused __attribute__((unused))
#endif

4
payloads/libpayload/include/fmap_serialized.h
View File

@ -56,7 +56,7 @@ struct fmap_area {
uint32_t size; /* size in bytes */
uint8_t name[FMAP_STRLEN]; /* descriptive name */
uint16_t flags; /* flags for this area */
} __attribute__((packed));
} __packed;
struct fmap {
uint8_t signature[8]; /* "__FMAP__" (0x5F5F464D41505F5F) */
@ -68,6 +68,6 @@ struct fmap {
uint16_t nareas; /* number of areas described by
fmap_areas[] below */
struct fmap_area areas[];
} __attribute__((packed));
} __packed;
#endif /* FLASHMAP_SERIALIZED_H__ */

3
payloads/libpayload/include/libpayload.h
View File

@ -44,6 +44,7 @@
#define _LIBPAYLOAD_H
#include <libpayload-config.h>
#include <compiler.h>
#include <cbgfx.h>
#include <ctype.h>
#include <die.h>
@ -361,7 +362,7 @@ long long int llabs(long long int j);
u8 bin2hex(u8 b);
u8 hex2bin(u8 h);
void hexdump(const void *memory, size_t length);
void fatal(const char *msg) __attribute__ ((noreturn));
void fatal(const char *msg) __attribute__((noreturn));
/* Count Leading Zeroes: clz(0) == 32, clz(0xf) == 28, clz(1 << 31) == 0 */
static inline int clz(u32 x) { return x ? __builtin_clz(x) : sizeof(x) * 8; }

2
payloads/libpayload/include/mips/arch/exception.h
View File

@ -70,7 +70,7 @@ struct exception_state_t {
u32 ra;
} regs;
u32 vector;
} __attribute__((packed));
} __packed;
extern struct exception_state_t *exception_state_ptr;
extern u32 *exception_stack_end;

8
payloads/libpayload/include/stdio.h
View File

@ -43,13 +43,13 @@ extern FILE *stdout, *stdin, *stderr;
* @{
*/
int snprintf(char *str, size_t size, const char *fmt, ...)
__attribute__ ((format (printf, 3, 4)));
__attribute__((format (printf, 3, 4)));
int sprintf(char *str, const char *fmt, ...)
__attribute__ ((format (printf, 2, 3)));
__attribute__((format (printf, 2, 3)));
int printf(const char *fmt, ...)
__attribute__ ((format (printf, 1, 2)));
__attribute__((format (printf, 1, 2)));
int fprintf(FILE *file, const char *fmt, ...)
__attribute__ ((format (printf, 2, 3)));
__attribute__((format (printf, 2, 3)));
/** @} */
void perror(const char *s);

4
payloads/libpayload/include/stdlib.h
View File

@ -214,8 +214,8 @@ void srand(unsigned int seed);
/**
* Stop execution and halt the processor (this function does not return).
*/
void halt(void) __attribute__ ((noreturn));
void exit(int status) __attribute__ ((noreturn));
void halt(void) __attribute__((noreturn));
void exit(int status) __attribute__((noreturn));
#define abort() halt() /**< Alias for the halt() function */
#if IS_ENABLED(CONFIG_LP_REMOTEGDB)
/* Override abort()/halt() to trap into GDB if it is enabled. */

22
payloads/libpayload/include/usb/usb.h
View File

@ -83,13 +83,13 @@ typedef struct {
unsigned long ttThinkTime:2;
unsigned long arePortIndicatorsSupported:1;
unsigned long:8;
} __attribute__ ((packed));
} __packed;
unsigned short wHubCharacteristics;
} __attribute__ ((packed));
} __packed;
unsigned char bPowerOn2PwrGood;
unsigned char bHubContrCurrent;
char DeviceRemovable[];
} __attribute__ ((packed)) hub_descriptor_t;
} __packed hub_descriptor_t;
typedef struct {
unsigned char bLength;
@ -106,7 +106,7 @@ typedef struct {
unsigned char iProduct;
unsigned char iSerialNumber;
unsigned char bNumConfigurations;
} __attribute__ ((packed)) device_descriptor_t;
} __packed device_descriptor_t;
typedef struct {
unsigned char bLength;
@ -117,7 +117,7 @@ typedef struct {
unsigned char iConfiguration;
unsigned char bmAttributes;
unsigned char bMaxPower;
} __attribute__ ((packed)) configuration_descriptor_t;
} __packed configuration_descriptor_t;
typedef struct {
unsigned char bLength;
@ -129,7 +129,7 @@ typedef struct {
unsigned char bInterfaceSubClass;
unsigned char bInterfaceProtocol;
unsigned char iInterface;
} __attribute__ ((packed)) interface_descriptor_t;
} __packed interface_descriptor_t;
typedef struct {
unsigned char bLength;
@ -138,7 +138,7 @@ typedef struct {
unsigned char bmAttributes;
unsigned short wMaxPacketSize;
unsigned char bInterval;
} __attribute__ ((packed)) endpoint_descriptor_t;
} __packed endpoint_descriptor_t;
typedef struct {
unsigned char bLength;
@ -148,7 +148,7 @@ typedef struct {
unsigned char bNumDescriptors;
unsigned char bReportDescriptorType;
unsigned short wReportDescriptorLength;
} __attribute__ ((packed)) hid_descriptor_t;
} __packed hid_descriptor_t;
typedef struct {
union {
@ -156,14 +156,14 @@ typedef struct {
dev_req_recp req_recp:5;
dev_req_type req_type:2;
dev_req_dir data_dir:1;
} __attribute__ ((packed));
} __packed;
unsigned char bmRequestType;
} __attribute__ ((packed));
} __packed;
unsigned char bRequest;
unsigned short wValue;
unsigned short wIndex;
unsigned short wLength;
} __attribute__ ((packed)) dev_req_t;
} __packed dev_req_t;
struct usbdev_hc;
typedef struct usbdev_hc hci_t;

2
payloads/libpayload/include/x86/arch/exception.h
View File

@ -58,7 +58,7 @@ struct exception_state
} regs;
u32 error_code;
u32 vector;
} __attribute__((packed));
} __packed;
extern struct exception_state *exception_state;
extern u32 exception_stack[];

4
payloads/libpayload/liblz4/lz4_wrapper.c
View File

@ -98,7 +98,7 @@ struct lz4_frame_header {
};
/* + uint64_t content_size iff has_content_size is set */
/* + uint8_t header_checksum */
} __attribute__((packed));
} __packed;
struct lz4_block_header {
union {
@ -110,7 +110,7 @@ struct lz4_block_header {
};
/* + size bytes of data */
/* + uint32_t block_checksum iff has_block_checksum is set */
} __attribute__((packed));
} __packed;
size_t ulz4fn(const void *src, size_t srcn, void *dst, size_t dstn)
{

2
payloads/libpayload/libpci/libpci.c
View File

@ -82,7 +82,7 @@ void pci_init(struct pci_access *pacc)
memset(pacc, 0, sizeof(*pacc));
}
void pci_cleanup(__attribute__ ((unused)) struct pci_access *pacc)
void pci_cleanup(__attribute__((unused)) struct pci_access *pacc)
{
}

2
src/arch/power8/include/arch/hlt.h
View File

@ -11,7 +11,7 @@
* GNU General Public License for more details.
*/
static inline __attribute__ ((always_inline)) void hlt(void)
static inline __attribute__((always_inline)) void hlt(void)
{
while (1)
;

4
src/arch/x86/acpi.c
View File

@ -855,7 +855,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
}
#endif
unsigned long __attribute__ ((weak)) fw_cfg_acpi_tables(unsigned long start)
unsigned long __attribute__((weak)) fw_cfg_acpi_tables(unsigned long start)
{
return 0;
}
@ -1122,7 +1122,7 @@ void acpi_save_gnvs(u32 gnvs_address)
*gnvs = gnvs_address;
}
__attribute__ ((weak)) int acpi_get_gpe(int gpe)
__attribute__((weak)) int acpi_get_gpe(int gpe)
{
return -1; /* implemented by SOC */
}

3
src/arch/x86/gdt.c
View File

@ -15,6 +15,7 @@
#include <types.h>
#include <string.h>
#include <compiler.h>
#include <cbmem.h>
#include <console/console.h>
#include <cpu/x86/gdt.h>
@ -27,7 +28,7 @@ struct gdtarg {
#else
u32 base;
#endif
} __attribute__((packed));
} __packed;
/* Copy GDT to new location and reload it.
* FIXME: We only do this for BSP CPU.

73
src/arch/x86/include/arch/acpi.h
View File

@ -45,6 +45,7 @@
#if !defined(__ASSEMBLER__) && !defined(__ACPI__) && !defined(__ROMCC__)
#include <stdint.h>
#include <compiler.h>
#include <rules.h>
#include <commonlib/helpers.h>
#include <device/device.h>
@ -77,7 +78,7 @@ typedef struct acpi_rsdp {
u64 xsdt_address; /* Physical address of XSDT (64 bits) */
u8 ext_checksum; /* Checksum of the whole table */
u8 reserved[3];
} __attribute__ ((packed)) acpi_rsdp_t;
} __packed acpi_rsdp_t;
/* Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum. */
/* GAS (Generic Address Structure) */
@ -92,7 +93,7 @@ typedef struct acpi_gen_regaddr {
};
u32 addrl; /* Register address, low 32 bits */
u32 addrh; /* Register address, high 32 bits */
} __attribute__ ((packed)) acpi_addr_t;
} __packed acpi_addr_t;
#define ACPI_ADDRESS_SPACE_MEMORY 0 /* System memory */
#define ACPI_ADDRESS_SPACE_IO 1 /* System I/O */
@ -128,7 +129,7 @@ typedef struct acpi_table_header {
u32 oem_revision; /* OEM revision number */
char asl_compiler_id[4]; /* ASL compiler vendor ID */
u32 asl_compiler_revision; /* ASL compiler revision number */
} __attribute__ ((packed)) acpi_header_t;
} __packed acpi_header_t;
/* A maximum number of 32 ACPI tables ought to be enough for now. */
#define MAX_ACPI_TABLES 32
@ -137,13 +138,13 @@ typedef struct acpi_table_header {
typedef struct acpi_rsdt {
struct acpi_table_header header;
u32 entry[MAX_ACPI_TABLES];
} __attribute__ ((packed)) acpi_rsdt_t;
} __packed acpi_rsdt_t;
/* XSDT (Extended System Description Table) */
typedef struct acpi_xsdt {
struct acpi_table_header header;
u64 entry[MAX_ACPI_TABLES];
} __attribute__ ((packed)) acpi_xsdt_t;
} __packed acpi_xsdt_t;
/* HPET timers */
typedef struct acpi_hpet {
@ -153,20 +154,20 @@ typedef struct acpi_hpet {
u8 number;
u16 min_tick;
u8 attributes;
} __attribute__ ((packed)) acpi_hpet_t;
} __packed acpi_hpet_t;
/* MCFG (PCI Express MMIO config space BAR description table) */
typedef struct acpi_mcfg {
struct acpi_table_header header;
u8 reserved[8];
} __attribute__ ((packed)) acpi_mcfg_t;
} __packed acpi_mcfg_t;
typedef struct acpi_tcpa {
struct acpi_table_header header;
u16 platform_class;
u32 laml;
u64 lasa;
} __attribute__ ((packed)) acpi_tcpa_t;
} __packed acpi_tcpa_t;
typedef struct acpi_mcfg_mmconfig {
u32 base_address;
@ -175,7 +176,7 @@ typedef struct acpi_mcfg_mmconfig {
u8 start_bus_number;
u8 end_bus_number;
u8 reserved[4];
} __attribute__ ((packed)) acpi_mcfg_mmconfig_t;
} __packed acpi_mcfg_mmconfig_t;
/* SRAT (System Resource Affinity Table) */
typedef struct acpi_srat {
@ -183,7 +184,7 @@ typedef struct acpi_srat {
u32 resv;
u64 resv1;
/* Followed by static resource allocation structure[n] */
} __attribute__ ((packed)) acpi_srat_t;
} __packed acpi_srat_t;
/* SRAT: Processor Local APIC/SAPIC Affinity Structure */
typedef struct acpi_srat_lapic {
@ -195,7 +196,7 @@ typedef struct acpi_srat_lapic {
u8 local_sapic_eid; /* Local SAPIC EID */
u8 proximity_domain_31_8[3]; /* Proximity domain bits[31:8] */
u32 resv; /* TODO: Clock domain in ACPI 4.0. */
} __attribute__ ((packed)) acpi_srat_lapic_t;
} __packed acpi_srat_lapic_t;
/* SRAT: Memory Affinity Structure */
typedef struct acpi_srat_mem {
@ -212,20 +213,20 @@ typedef struct acpi_srat_mem {
* other bits reserved to 0
*/
u32 resv2[2];
} __attribute__ ((packed)) acpi_srat_mem_t;
} __packed acpi_srat_mem_t;
/* SLIT (System Locality Distance Information Table) */
typedef struct acpi_slit {
struct acpi_table_header header;
/* Followed by static resource allocation 8+byte[num*num] */
} __attribute__ ((packed)) acpi_slit_t;
} __packed acpi_slit_t;
/* MADT (Multiple APIC Description Table) */
typedef struct acpi_madt {
struct acpi_table_header header;
u32 lapic_addr; /* Local APIC address */
u32 flags; /* Multiple APIC flags */
} __attribute__ ((packed)) acpi_madt_t;
} __packed acpi_madt_t;
/* VFCT image header */
struct acpi_vfct_image_hdr {
@ -239,7 +240,7 @@ struct acpi_vfct_image_hdr {
u32 Revision;
u32 ImageLength;
u8 VbiosContent; // dummy - copy VBIOS here
} __attribute__ ((packed));
} __packed;
/* VFCT (VBIOS Fetch Table) */
struct acpi_vfct {
@ -249,10 +250,10 @@ struct acpi_vfct {
u32 Lib1ImageOffset;
u32 Reserved[4];
struct acpi_vfct_image_hdr image_hdr;
} __attribute__ ((packed));
} __packed;
typedef struct acpi_ivrs_info {
} __attribute__ ((packed)) acpi_ivrs_info_t;
} __packed acpi_ivrs_info_t;
/* IVRS IVHD (I/O Virtualization Hardware Definition Block) Type 10h */
typedef struct acpi_ivrs_ivhd {
@ -267,7 +268,7 @@ typedef struct acpi_ivrs_ivhd {
uint16_t iommu_info;
uint32_t iommu_feature_info;
uint8_t entry[0];
} __attribute__ ((packed)) acpi_ivrs_ivhd_t;
} __packed acpi_ivrs_ivhd_t;
/* IVRS (I/O Virtualization Reporting Structure) Type 10h */
typedef struct acpi_ivrs {
@ -275,7 +276,7 @@ typedef struct acpi_ivrs {
uint32_t iv_info;
uint32_t reserved[2];
struct acpi_ivrs_ivhd ivhd;
} __attribute__ ((packed)) acpi_ivrs_t;
} __packed acpi_ivrs_t;
enum dev_scope_type {
SCOPE_PCI_ENDPOINT = 1,
@ -293,8 +294,8 @@ typedef struct dev_scope {
struct {
u8 dev;
u8 fn;
} __attribute__((packed)) path[0];
} __attribute__ ((packed)) dev_scope_t;
} __packed path[0];
} __packed dev_scope_t;
enum dmar_type {
DMAR_DRHD = 0,
@ -319,7 +320,7 @@ typedef struct dmar_entry {
u8 reserved;
u16 segment;
u64 bar;
} __attribute__ ((packed)) dmar_entry_t;
} __packed dmar_entry_t;
typedef struct dmar_atsr_entry {
u16 type;
@ -327,7 +328,7 @@ typedef struct dmar_atsr_entry {
u8 flags;
u8 reserved;
u16 segment;
} __attribute__ ((packed)) dmar_atsr_entry_t;
} __packed dmar_atsr_entry_t;
/* DMAR (DMA Remapping Reporting Structure) */
typedef struct acpi_dmar {
@ -336,7 +337,7 @@ typedef struct acpi_dmar {
u8 flags;
u8 reserved[10];
dmar_entry_t structure[0];
} __attribute__ ((packed)) acpi_dmar_t;
} __packed acpi_dmar_t;
/* MADT: APIC Structure Types */
/* TODO: Convert to ALLCAPS. */
@ -363,7 +364,7 @@ typedef struct acpi_madt_lapic {
u8 processor_id; /* ACPI processor ID */
u8 apic_id; /* Local APIC ID */
u32 flags; /* Local APIC flags */
} __attribute__ ((packed)) acpi_madt_lapic_t;
} __packed acpi_madt_lapic_t;
/* MADT: Local APIC NMI Structure */
typedef struct acpi_madt_lapic_nmi {
@ -372,7 +373,7 @@ typedef struct acpi_madt_lapic_nmi {
u8 processor_id; /* ACPI processor ID */
u16 flags; /* MPS INTI flags */
u8 lint; /* Local APIC LINT# */
} __attribute__ ((packed)) acpi_madt_lapic_nmi_t;
} __packed acpi_madt_lapic_nmi_t;
/* MADT: I/O APIC Structure */
typedef struct acpi_madt_ioapic {
@ -382,7 +383,7 @@ typedef struct acpi_madt_ioapic {
u8 reserved;
u32 ioapic_addr; /* I/O APIC address */
u32 gsi_base; /* Global system interrupt base */
} __attribute__ ((packed)) acpi_madt_ioapic_t;
} __packed acpi_madt_ioapic_t;
/* MADT: Interrupt Source Override Structure */
typedef struct acpi_madt_irqoverride {
@ -392,7 +393,7 @@ typedef struct acpi_madt_irqoverride {
u8 source; /* Bus-relative int. source (IRQ) */
u32 gsirq; /* Global system interrupt */
u16 flags; /* MPS INTI flags */
} __attribute__ ((packed)) acpi_madt_irqoverride_t;
} __packed acpi_madt_irqoverride_t;
/* FADT (Fixed ACPI Description Table) */
typedef struct acpi_fadt {
@ -452,7 +453,7 @@ typedef struct acpi_fadt {
struct acpi_gen_regaddr x_pm_tmr_blk;
struct acpi_gen_regaddr x_gpe0_blk;
struct acpi_gen_regaddr x_gpe1_blk;
} __attribute__ ((packed)) acpi_fadt_t;
} __packed acpi_fadt_t;
/* FADT TABLE Revision values */
#define ACPI_FADT_REV_ACPI_1_0 1
@ -524,7 +525,7 @@ typedef struct acpi_facs {
u32 x_firmware_waking_vector_h; /* X FW waking vector, high */
u8 version; /* ACPI 4.0: 2 */
u8 resv[31]; /* FIXME: 4.0: ospm_flags */
} __attribute__ ((packed)) acpi_facs_t;
} __packed acpi_facs_t;
/* FACS flags */
#define ACPI_FACS_S4BIOS_F (1 << 0)
@ -539,14 +540,14 @@ typedef struct acpi_ecdt {
u32 uid; /* UID */
u8 gpe_bit; /* GPE bit */
u8 ec_id[]; /* EC ID */
} __attribute__ ((packed)) acpi_ecdt_t;
} __packed acpi_ecdt_t;
/* HEST (Hardware Error Source Table) */
typedef struct acpi_hest {
struct acpi_table_header header;
u32 error_source_count;
/* error_source_struct(s) */
} __attribute__ ((packed)) acpi_hest_t;
} __packed acpi_hest_t;
/* Error Source Descriptors */
typedef struct acpi_hest_esd {
@ -559,7 +560,7 @@ typedef struct acpi_hest_esd {
* pre-allocate for this error source.
*/
u32 max_section_per_record;
} __attribute__ ((packed)) acpi_hest_esd_t;
} __packed acpi_hest_esd_t;
/* Hardware Error Notification */
typedef struct acpi_hest_hen {
@ -572,14 +573,14 @@ typedef struct acpi_hest_hen {
u32 sw2poll_threshold_win;
u32 error_threshold_val;
u32 error_threshold_win;
} __attribute__ ((packed)) acpi_hest_hen_t;
} __packed acpi_hest_hen_t;
typedef struct acpi_cstate {
u8 ctype;
u16 latency;
u32 power;
acpi_addr_t resource;
} __attribute__ ((packed)) acpi_cstate_t;
} __packed acpi_cstate_t;
typedef struct acpi_tstate {
u32 percent;
@ -587,7 +588,7 @@ typedef struct acpi_tstate {
u32 latency;
u32 control;
u32 status;
} __attribute__ ((packed)) acpi_tstate_t;
} __packed acpi_tstate_t;
unsigned long fw_cfg_acpi_tables(unsigned long start);

12
src/arch/x86/include/arch/io.h
View File

@ -432,28 +432,28 @@ void pnp_set_drq(pnp_devfn_t dev, unsigned int index, unsigned int drq)
#include <device/pci_ops.h>
#endif
static inline __attribute__ ((always_inline))
static inline __attribute__((always_inline))
void pci_or_config8(device_t dev, unsigned int where, u8 ormask)
{
u8 value = pci_read_config8(dev, where);
pci_write_config8(dev, where, value | ormask);
}
static inline __attribute__ ((always_inline))
static inline __attribute__((always_inline))
void pci_or_config16(device_t dev, unsigned int where, u16 ormask)
{
u16 value = pci_read_config16(dev, where);
pci_write_config16(dev, where, value | ormask);
}
static inline __attribute__ ((always_inline))
static inline __attribute__((always_inline))
void pci_or_config32(device_t dev, unsigned int where, u32 ormask)
{
u32 value = pci_read_config32(dev, where);
pci_write_config32(dev, where, value | ormask);
}
static inline __attribute__ ((always_inline))
static inline __attribute__((always_inline))
void pci_update_config8(device_t dev, int reg, u8 mask, u8 or)
{
u8 reg8;
@ -464,7 +464,7 @@ void pci_update_config8(device_t dev, int reg, u8 mask, u8 or)
pci_write_config8(dev, reg, reg8);
}
static inline __attribute__ ((always_inline))
static inline __attribute__((always_inline))
void pci_update_config16(device_t dev, int reg, u16 mask, u16 or)
{
u16 reg16;
@ -475,7 +475,7 @@ void pci_update_config16(device_t dev, int reg, u16 mask, u16 or)
pci_write_config16(dev, reg, reg16);
}
static inline __attribute__ ((always_inline))
static inline __attribute__((always_inline))
void pci_update_config32(device_t dev, int reg, u32 mask, u32 or)
{
u32 reg32;

12
src/arch/x86/include/arch/pci_mmio_cfg.h
View File

@ -20,7 +20,7 @@
#define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS
static inline __attribute__ ((always_inline))
static inline __attribute__((always_inline))
u8 pci_mmio_read_config8(pci_devfn_t dev, unsigned int where)
{
void *addr;
@ -28,7 +28,7 @@ u8 pci_mmio_read_config8(pci_devfn_t dev, unsigned int where)
return read8(addr);
}
static inline __attribute__ ((always_inline))
static inline __attribute__((always_inline))
u16 pci_mmio_read_config16(pci_devfn_t dev, unsigned int where)
{
void *addr;
@ -36,7 +36,7 @@ u16 pci_mmio_read_config16(pci_devfn_t dev, unsigned int where)
return read16(addr);
}
static inline __attribute__ ((always_inline))
static inline __attribute__((always_inline))
u32 pci_mmio_read_config32(pci_devfn_t dev, unsigned int where)
{
void *addr;
@ -44,7 +44,7 @@ u32 pci_mmio_read_config32(pci_devfn_t dev, unsigned int where)
return read32(addr);
}
static inline __attribute__ ((always_inline))
static inline __attribute__((always_inline))
void pci_mmio_write_config8(pci_devfn_t dev, unsigned int where, u8 value)
{
void *addr;
@ -52,7 +52,7 @@ void pci_mmio_write_config8(pci_devfn_t dev, unsigned int where, u8 value)
write8(addr, value);
}
static inline __attribute__ ((always_inline))
static inline __attribute__((always_inline))
void pci_mmio_write_config16(pci_devfn_t dev, unsigned int where, u16 value)
{
void *addr;
@ -60,7 +60,7 @@ void pci_mmio_write_config16(pci_devfn_t dev, unsigned int where, u16 value)
write16(addr, value);
}
static inline __attribute__ ((always_inline))
static inline __attribute__((always_inline))
void pci_mmio_write_config32(pci_devfn_t dev, unsigned int where, u32 value)
{
void *addr;

7
src/arch/x86/include/arch/pirq_routing.h
View File

@ -28,6 +28,7 @@
#define MAX_INTX_ENTRIES 4
#include <stdint.h>
#include <compiler.h>
#define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
#define PIRQ_VERSION 0x0100
@ -37,10 +38,10 @@ struct irq_info {
struct {
u8 link; /* IRQ line ID, chipset dependent, 0=not routed */
u16 bitmap; /* Available IRQs */
} __attribute__((packed)) irq[4];
} __packed irq[4];
u8 slot; /* Slot number, 0=onboard */
u8 rfu;
} __attribute__((packed));
} __packed;
struct irq_routing_table {
u32 signature; /* PIRQ_SIGNATURE should be here */
@ -53,7 +54,7 @@ struct irq_routing_table {
u8 rfu[11];
u8 checksum; /* Modulo 256 checksum must give zero */
struct irq_info slots[CONFIG_IRQ_SLOT_COUNT];
} __attribute__((packed));
} __packed;
unsigned long copy_pirq_routing_table(unsigned long addr,
const struct irq_routing_table *routing_table);

14
src/arch/x86/include/arch/registers.h
View File

@ -16,7 +16,7 @@
#ifndef __ARCH_REGISTERS_H
#define __ARCH_REGISTERS_H
#define __PACKED __attribute__((packed))
#include <compiler.h>
#define DOWNTO8(A) \
union { \
@ -25,22 +25,22 @@
struct { \
uint8_t A##l; \
uint8_t A##h; \
} __PACKED; \
} __packed; \
uint16_t A##x; \
} __PACKED; \
} __packed; \
uint16_t h##A##x; \
} __PACKED; \
} __packed; \
uint32_t e##A##x; \
} __PACKED;
} __packed;
#define DOWNTO16(A) \
union { \
struct { \
uint16_t A; \
uint16_t h##A; \
} __PACKED; \
} __packed; \
uint32_t e##A; \
} __PACKED;
} __packed;
struct eregs {
DOWNTO8(a);

23
src/arch/x86/include/arch/smp/mpspec.h
View File

@ -16,6 +16,7 @@
#ifndef __ASM_MPSPEC_H
#define __ASM_MPSPEC_H
#include <compiler.h>
#include <device/device.h>
#include <cpu/x86/lapic_def.h>
@ -52,7 +53,7 @@ struct intel_mp_floating {
u8 mpf_feature3; /* Unused (0) */
u8 mpf_feature4; /* Unused (0) */
u8 mpf_feature5; /* Unused (0) */
} __attribute__((packed));
} __packed;
struct mp_config_table {
char mpc_signature[4];
@ -69,7 +70,7 @@ struct mp_config_table {
u16 mpe_length; /* Extended Table size */
u8 mpe_checksum; /* Extended Table checksum */
u8 reserved;
} __attribute__((packed));
} __packed;
/* Followed by entries */
@ -92,13 +93,13 @@ struct mpc_config_processor {
#define MPC_CPU_FAMILY_MASK 0xF00
u32 mpc_featureflag; /* CPUID feature value */
u32 mpc_reserved[2];
} __attribute__((packed));
} __packed;
struct mpc_config_bus {
u8 mpc_type;
u8 mpc_busid;
u8 mpc_bustype[6];
} __attribute__((packed));
} __packed;
#define BUSTYPE_EISA "EISA"
#define BUSTYPE_ISA "ISA"
@ -115,7 +116,7 @@ struct mpc_config_ioapic {
u8 mpc_flags;
#define MPC_APIC_USABLE 0x01
void *mpc_apicaddr;
} __attribute__((packed));
} __packed;
struct mpc_config_intsrc {
u8 mpc_type;
@ -125,7 +126,7 @@ struct mpc_config_intsrc {
u8 mpc_srcbusirq;
u8 mpc_dstapic;
u8 mpc_dstirq;
} __attribute__((packed));
} __packed;
enum mp_irq_source_types {
mp_INT = 0,
@ -153,7 +154,7 @@ struct mpc_config_lintsrc {
u8 mpc_destapic;
#define MP_APIC_ALL 0xFF
u8 mpc_destapiclint;
} __attribute__((packed));
} __packed;
/*
* Default configurations
@ -185,7 +186,7 @@ enum mp_bustype {
struct mp_exten_config {
u8 mpe_type;
u8 mpe_length;
} __attribute__((packed));
} __packed;
typedef struct mp_exten_config *mpe_t;
@ -201,7 +202,7 @@ struct mp_exten_system_address_space {
u32 mpe_address_base_high;
u32 mpe_address_length_low;
u32 mpe_address_length_high;
} __attribute__((packed));
} __packed;
struct mp_exten_bus_hierarchy {
u8 mpe_type;
@ -211,7 +212,7 @@ struct mp_exten_bus_hierarchy {
#define BUS_SUBTRACTIVE_DECODE 1
u8 mpe_parent_busid;
u8 reserved[3];
} __attribute__((packed));
} __packed;
struct mp_exten_compatibility_address_space {
u8 mpe_type;
@ -237,7 +238,7 @@ struct mp_exten_compatibility_address_space {
* XFB0 - XFBB
* XFC0 - XCDF
*/
} __attribute__((packed));
} __packed;
void mptable_init(struct mp_config_table *mc, u32 lapic_addr);
void *smp_next_mpc_entry(struct mp_config_table *mc);

3
src/commonlib/fsp_relocate.c
View File

@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
#include <compiler.h>
#include <console/console.h>
#include <commonlib/endian.h>
#include <commonlib/fsp.h>
@ -67,7 +68,7 @@ struct fsp_patch_table {
uint8_t reserved;
uint32_t patch_entry_num;
uint32_t patch_entries[0];
} __attribute__((packed));
} __packed;
#define FSPP_SIG 0x50505346

21
src/commonlib/include/commonlib/cbfs_serialized.h
View File

@ -48,6 +48,7 @@
#define _CBFS_SERIALIZED_H_
#include <stdint.h>
#include <compiler.h>
/** These are standard values for the known compression
algorithms that coreboot knows about for stages and
@ -101,7 +102,7 @@ struct cbfs_header {
uint32_t offset;
uint32_t architecture;
uint32_t pad[1];
} __attribute__((packed));
} __packed;
/* this used to be flexible, but wasn't ever set to something different. */
#define CBFS_ALIGNMENT 64
@ -136,7 +137,7 @@ struct cbfs_file {
uint32_t type;
uint32_t attributes_offset;
uint32_t offset;
} __attribute__((packed));
} __packed;
/* The common fields of extended cbfs file attributes.
Attributes are expected to start with tag/len, then append their
@ -146,7 +147,7 @@ struct cbfs_file_attribute {
/* len covers the whole structure, incl. tag and len */
uint32_t len;
uint8_t data[0];
} __attribute__((packed));
} __packed;
/* Depending on how the header was initialized, it may be backed with 0x00 or
* 0xff. Support both. */
@ -163,7 +164,7 @@ struct cbfs_file_attr_compression {
/* whole file compression format. 0 if no compression. */
uint32_t compression;
uint32_t decompressed_size;
} __attribute__((packed));
} __packed;
struct cbfs_file_attr_hash {
uint32_t tag;
@ -171,19 +172,19 @@ struct cbfs_file_attr_hash {
uint32_t hash_type;
/* hash_data is len - sizeof(struct) bytes */
uint8_t hash_data[];
} __attribute__((packed));
} __packed;
struct cbfs_file_attr_position {
uint32_t tag;
uint32_t len;
uint32_t position;
} __attribute__((packed));
} __packed;
struct cbfs_file_attr_align {
uint32_t tag;
uint32_t len;
uint32_t alignment;
} __attribute__((packed));
} __packed;
/*
* ROMCC does not understand uint64_t, so we hide future definitions as they are
@ -205,7 +206,7 @@ struct cbfs_stage {
uint64_t load; /** Where to load in memory */
uint32_t len; /** length of data to load */
uint32_t memlen; /** total length of object in memory */
} __attribute__((packed));
} __packed;
/** this is the sub-header for payload components. Payloads
are loaded by coreboot at the end of the boot process */
@ -217,7 +218,7 @@ struct cbfs_payload_segment {
uint64_t load_addr;
uint32_t len;
uint32_t mem_len;
} __attribute__((packed));
} __packed;
struct cbfs_payload {
struct cbfs_payload_segment segments;
@ -232,7 +233,7 @@ struct cbfs_payload {
struct cbfs_optionrom {
uint32_t compression;
uint32_t len;
} __attribute__((packed));
} __packed;
#endif /* __ROMCC__ */

5
src/commonlib/include/commonlib/fmap_serialized.h
View File

@ -37,6 +37,7 @@
#define FLASHMAP_SERIALIZED_H__
#include <stdint.h>
#include <compiler.h>
#define FMAP_SIGNATURE "__FMAP__"
#define FMAP_VER_MAJOR 1 /* this header's FMAP minor version */
@ -56,7 +57,7 @@ struct fmap_area {
uint32_t size; /* size in bytes */
uint8_t name[FMAP_STRLEN]; /* descriptive name */
uint16_t flags; /* flags for this area */
} __attribute__((packed));
} __packed;
struct fmap {
uint8_t signature[8]; /* "__FMAP__" (0x5F5F464D41505F5F) */
@ -68,6 +69,6 @@ struct fmap {
uint16_t nareas; /* number of areas described by
fmap_areas[] below */
struct fmap_area areas[];
} __attribute__((packed));
} __packed;
#endif /* FLASHMAP_SERIALIZED_H__ */

3
src/commonlib/include/commonlib/rmodule-defs.h
View File

@ -17,6 +17,7 @@
#include <stdint.h>
#include <stddef.h>
#include <compiler.h>
#define RMODULE_MAGIC 0xf8fe
#define RMODULE_VERSION_1 1
@ -54,6 +55,6 @@ struct rmodule_header {
uint32_t bss_end;
/* Add some room for growth. */
uint32_t padding[4];
} __attribute__ ((packed));
} __packed;
#endif /* RMODULE_DEFS_H */

5
src/commonlib/include/commonlib/timestamp_serialized.h
View File

@ -17,11 +17,12 @@
#define __TIMESTAMP_SERIALIZED_H__
#include <stdint.h>
#include <compiler.h>
struct timestamp_entry {
uint32_t entry_id;
uint64_t entry_stamp;
} __attribute__((packed));
} __packed;
struct timestamp_table {
uint64_t base_time;
@ -29,7 +30,7 @@ struct timestamp_table {
uint16_t tick_freq_mhz;
uint32_t num_entries;
struct timestamp_entry entries[0]; /* Variable number of entries */
} __attribute__((packed));
} __packed;
enum timestamp_id {
TS_START_ROMSTAGE = 1,

5
src/commonlib/lz4_wrapper.c
View File

@ -34,6 +34,7 @@
#include <commonlib/helpers.h>
#include <stdint.h>
#include <string.h>
#include <compiler.h>
/* LZ4 comes with its own supposedly portable memory access functions, but they
* seem to be very inefficient in practice (at least on ARM64). Since coreboot
@ -115,7 +116,7 @@ struct lz4_frame_header {
};
/* + uint64_t content_size iff has_content_size is set */
/* + uint8_t header_checksum */
} __attribute__((packed));
} __packed;
struct lz4_block_header {
union {
@ -127,7 +128,7 @@ struct lz4_block_header {
};
/* + size bytes of data */
/* + uint32_t block_checksum iff has_block_checksum is set */
} __attribute__((packed));
} __packed;
size_t ulz4fn(const void *src, size_t srcn, void *dst, size_t dstn)
{

3
src/cpu/allwinner/a10/clock.h
View File

@ -23,6 +23,7 @@
#include "memmap.h"
#include <types.h>
#include <compiler.h>
/* CPU_AHB_APB0 config values */
#define CPU_CLK_SRC_MASK (3 << 16)
@ -267,7 +268,7 @@ struct a10_ccm {
u32 mali_clk_cfg; /* 0x154 */
u8 res7[0x4];
u32 mbus_clk_cfg; /* 0x15c */
} __attribute__ ((packed));
} __packed;
void a1x_periph_clock_enable(enum a1x_clken periph);
void a1x_periph_clock_disable(enum a1x_clken periph);

5
src/cpu/allwinner/a10/gpio.h
View File

@ -19,6 +19,7 @@
#define __CPU_ALLWINNER_A10_PINMUX_H
#include <types.h>
#include <compiler.h>
#define GPIO_BASE 0x01C20800
@ -42,7 +43,7 @@ struct a10_gpio_port {
u32 dat;
u32 drv[2];
u32 pul[2];
} __attribute__ ((packed));
} __packed;
struct a10_gpio {
struct a10_gpio_port port[10];
@ -58,7 +59,7 @@ struct a10_gpio {
u32 sdr_pad_drv;
u32 sdr_pad_pul;
} __attribute__ ((packed));
} __packed;
/* gpio.c */
void gpio_set(u8 port, u8 pin);

15
src/cpu/allwinner/a10/timer.h
View File

@ -23,6 +23,7 @@
#include "memmap.h"
#include <types.h>
#include <compiler.h>
/* TMRx_CTRL values */
#define TIMER_CTRL_MODE_SINGLE (1 << 7)
@ -48,7 +49,7 @@ struct a1x_timer {
u32 interval;
u32 val;
u8 res[4];
} __attribute__ ((packed));
} __packed;
/* Audio video sync*/
struct a1x_avs {
@ -56,27 +57,27 @@ struct a1x_avs {
u32 cnt0; /* 0x84 */
u32 cnt1; /* 0x88 */
u32 div; /* 0x8c */
} __attribute__ ((packed));
} __packed;
/* Watchdog */
struct a1x_wdog {
u32 ctrl; /* 0x90 */
u32 mode; /* 0x94 */
} __attribute__ ((packed));
} __packed;
/* 64 bit counter */
struct a1x_64cnt {
u32 ctrl; /* 0xa0 */
u32 lo; /* 0xa4 */
u32 hi; /* 0xa8 */
} __attribute__ ((packed));
} __packed;
/* Rtc */
struct a1x_rtc {
u32 ctrl; /* 0x100 */
u32 yymmdd; /* 0x104 */
u32 hhmmss; /* 0x108 */
} __attribute__ ((packed));
} __packed;
/* Alarm */
struct a1x_alarm {
@ -85,7 +86,7 @@ struct a1x_alarm {
u32 en; /* 0x114 */
u32 irq_en; /* 0x118 */
u32 irq_sta; /* 0x11c */
} __attribute__ ((packed));
} __packed;
struct a1x_timer_module {
u32 irq_en; /* 0x00 */
@ -103,7 +104,7 @@ struct a1x_timer_module {
u32 gp_data[4];
u8 res5[8];
u32 cpu_cfg;
} __attribute__ ((packed));
} __packed;
u8 a1x_get_cpu_chip_revision(void);

3
src/cpu/allwinner/a10/uart.h
View File

@ -26,6 +26,7 @@
#define CPU_ALLWINNER_A10_UART_H
#include <types.h>
#include <compiler.h>
struct a10_uart {
union {
@ -71,7 +72,7 @@ struct a10_uart {
u8 reserved_0xa0[4];
u32 halt; /* Halt register */
} __attribute__ ((packed));
} __packed;
enum uart_parity {
UART_PARITY_NONE,

2
src/cpu/amd/family_10h-family_15h/init_cpus.c
View File

@ -231,7 +231,7 @@ static inline int lapic_remote_read(int apicid, int reg, u32 *pvalue)
static void init_fidvid_ap(u32 apicid, u32 nodeid, u32 coreid);
#endif
static inline __attribute__ ((always_inline))
static inline __attribute__((always_inline))
void print_apicid_nodeid_coreid(u32 apicid, struct node_core_id id,
const char *str)
{

2
src/cpu/amd/model_fxx/init_cpus.c
View File

@ -144,7 +144,7 @@ static inline int lapic_remote_read(int apicid, int reg, u32 *pvalue)
static void init_fidvid_ap(u32 bsp_apicid, u32 apicid);
#endif
static inline __attribute__ ((always_inline))
static inline __attribute__((always_inline))
void print_apicid_nodeid_coreid(u32 apicid, struct node_core_id id,
const char *str)
{

2
src/cpu/amd/model_fxx/microcode_blob.c
View File

@ -11,7 +11,7 @@
* GNU General Public License for more details.
*/
unsigned char microcode[] __attribute__ ((aligned(16))) = {
unsigned char microcode[] __attribute__((aligned(16))) = {
#if !IS_ENABLED(CONFIG_K8_REV_F_SUPPORT)
#include "../../../../3rdparty/blobs/cpu/amd/model_fxx/microcode.h"
#endif

3
src/cpu/intel/smm/gen1/smmrelocate.c
View File

@ -18,6 +18,7 @@
#include <types.h>
#include <string.h>
#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <cpu/cpu.h>
@ -40,7 +41,7 @@ struct ied_header {
char signature[10];
u32 size;
u8 reserved[34];
} __attribute__ ((packed));
} __packed;
struct smm_relocation_params {

17
src/cpu/ti/am335x/clock.h
View File

@ -16,6 +16,7 @@
#define __CPU_TI_AM335X_CLOCK_H__
#include <stdint.h>
#include <compiler.h>
enum {
CM_ST_NO_SLEEP = 0x0,
@ -106,7 +107,7 @@ struct am335x_cm_per_regs {
uint32_t lcdc_st; // 0x148
uint32_t clkdiv32k; // 0x14c
uint32_t clk_24mhz_st; // 0x150
} __attribute__((packed));
} __packed;
static struct am335x_cm_per_regs * const am335x_cm_per = (void *)0x44e00000;
/* Clock module wakeup registers */
@ -166,7 +167,7 @@ struct am335x_cm_wkup_regs {
uint8_t _rsv0[4]; // 0xd0-0xd3
uint32_t wkup_wdt1; // 0xd4
uint32_t div_m6_dpll_core; // 0xd8
} __attribute__((packed));
} __packed;
static struct am335x_cm_wkup_regs * const am335x_cm_wkup = (void *)0x44e00400;
/* Clock module pll registers */
@ -187,20 +188,20 @@ struct am335x_cm_dpll_regs {
uint32_t clksel_lcdc_pixel_clk; // 0x34
uint32_t clksel_wdt1_clk; // 0x38
uint32_t clksel_gpio0_dbclk; // 0x3c
} __attribute__((packed));
} __packed;
static struct am335x_cm_dpll_regs * const am335x_cm_dpll = (void *)0x44e00500;
/* Clock module mpu registers */
struct am335x_cm_mpu_regs {
uint32_t st; // 0x0
uint32_t mpu; // 0x4
} __attribute__((packed));
} __packed;
static struct am335x_cm_mpu_regs * const am335x_cm_mpu = (void *)0x44e00600;
/* Clock module device registers */
struct am335x_cm_device_regs {
uint32_t cm_clkout_ctrl; // 0x0
} __attribute__((packed));
} __packed;
static struct am335x_cm_device_regs * const am335x_cm_device =
(void *)0x44e00700;
@ -208,7 +209,7 @@ static struct am335x_cm_device_regs * const am335x_cm_device =
struct am335x_cm_rtc_regs {
uint32_t rtc; // 0x0
uint32_t st; // 0x4
} __attribute__((packed));
} __packed;
static struct am335x_cm_rtc_regs * const am335x_cm_rtc = (void *)0x44e00800;
/* Clock module graphics controller registers */
@ -219,7 +220,7 @@ struct am335x_cm_gfx_regs {
uint32_t l4ls_gfx_st; // 0xc
uint32_t mmucfg; // 0x10
uint32_t mmudata; // 0x14
} __attribute__((packed));
} __packed;
static struct am335x_cm_gfx_regs * const am335x_cm_gfx = (void *)0x44e00900;
/* Clock module efuse registers */
@ -227,7 +228,7 @@ struct am335x_cm_cefuse_regs {
uint32_t st; // 0x0
uint8_t _rsv0[0x1c]; // 0x4-0x1f
uint32_t cefuse; // 0x20
} __attribute__((packed));
} __packed;
static struct am335x_cm_cefuse_regs * const am335x_cm_cefuse =
(void *)0x44e00a00;

3
src/cpu/ti/am335x/gpio.h
View File

@ -16,6 +16,7 @@
#define __CPU_TI_AM335X_GPIO_H__
#include <stdint.h>
#include <compiler.h>
enum {
AM335X_GPIO_BITS_PER_BANK = 32
@ -53,7 +54,7 @@ struct am335x_gpio_regs {
uint8_t _rsv4[0x38]; // 0x158-0x18f
uint32_t cleardataout; // 0x190
uint32_t setdataout; // 0x194
} __attribute__((packed));
} __packed;
static struct am335x_gpio_regs * const am335x_gpio_banks[] = {
(void *)0x44e07000, (void *)0x4804c000,

3
src/cpu/ti/am335x/header.c
View File

@ -15,6 +15,7 @@
#include <stddef.h>
#include <stdint.h>
#include <symbols.h>
#include <compiler.h>
#include "header.h"
@ -25,7 +26,7 @@ struct config_headers {
// An inert instance of chsettings.
struct configuration_header_settings chsettings;
} __attribute__((packed));
} __packed;
struct omap_image_headers {
union {

7
src/cpu/ti/am335x/header.h
View File

@ -16,6 +16,7 @@
#define __CPU_TI_AM335X_HEADER_H
#include <stdint.h>
#include <compiler.h>
struct configuration_header_toc_item {
// Offset from the start address of the TOC to the actual address of
@ -30,7 +31,7 @@ struct configuration_header_toc_item {
// 12-character name of a section, including the zero (\0) terminator.
char filename[12];
} __attribute__((packed));
} __packed;
struct configuration_header_settings {
// Key used for section verification.
@ -49,7 +50,7 @@ struct configuration_header_settings {
// Flags. It's not clear what this is used for.
uint32_t flags;
} __attribute__((packed));
} __packed;
struct gp_device_header {
// Size of the image.
@ -57,6 +58,6 @@ struct gp_device_header {
// Address to store the image/code entry point.
uint32_t destination;
} __attribute__((packed));
} __packed;
#endif

4
src/cpu/ti/am335x/uart.h
View File

@ -15,6 +15,8 @@
#ifndef AM335X_UART_H
#define AM335X_UART_H
#include <compiler.h>
#define AM335X_UART0_BASE 0x44e09000
#define AM335X_UART1_BASE 0x48020000
#define AM335X_UART2_BASE 0x48024000
@ -168,6 +170,6 @@ struct am335x_uart {
uint8_t rsvd_0x82[2];
uint16_t txdma; /* TX DMA threshold */
} __attribute__((packed));
} __packed;
#endif /* AM335X_UART_H */

5
src/cpu/x86/mp_init.c
View File

@ -16,6 +16,7 @@
#include <console/console.h>
#include <stdint.h>
#include <compiler.h>
#include <rmodule.h>
#include <arch/cpu.h>
#include <cpu/cpu.h>
@ -103,14 +104,14 @@ struct sipi_params {
uint32_t msr_count;
uint32_t c_handler;
atomic_t ap_count;
} __attribute__((packed));
} __packed;
/* This also needs to match the assembly code for saved MSR encoding. */
struct saved_msr {
uint32_t index;
uint32_t lo;
uint32_t hi;
} __attribute__((packed));
} __packed;
/* The sipi vector rmodule is included in the ramstage using 'objdump -B'. */

7
src/cpu/x86/pae/pgtbl.c
View File

@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
#include <compiler.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <cpu/x86/pae.h>
@ -59,14 +60,14 @@ void *map_2M_page(unsigned long page)
struct pde {
uint32_t addr_lo;
uint32_t addr_hi;
} __attribute__ ((packed));
} __packed;
struct pg_table {
struct pde pd[2048];
struct pde pdp[512];
} __attribute__ ((packed));
} __packed;
static struct pg_table pgtbl[CONFIG_MAX_CPUS]
__attribute__ ((aligned(4096)));
__attribute__((aligned(4096)));
static unsigned long mapped_window[CONFIG_MAX_CPUS];
unsigned long index;
unsigned long window;

2
src/cpu/x86/smm/smihandler.c
View File

@ -28,7 +28,7 @@ static int do_driver_init = 1;
typedef enum { SMI_LOCKED, SMI_UNLOCKED } smi_semaphore;
/* SMI multiprocessing semaphore */
static __attribute__ ((aligned(4))) volatile smi_semaphore smi_handler_status
static __attribute__((aligned(4))) volatile smi_semaphore smi_handler_status
= SMI_UNLOCKED;
static int smi_obtain_lock(void)

2
src/cpu/x86/smm/smm_module_handler.c
View File

@ -28,7 +28,7 @@ typedef enum { SMI_LOCKED, SMI_UNLOCKED } smi_semaphore;
/* SMI multiprocessing semaphore */
static volatile
__attribute__ ((aligned(4))) smi_semaphore smi_handler_status = SMI_UNLOCKED;
__attribute__((aligned(4))) smi_semaphore smi_handler_status = SMI_UNLOCKED;
static int smi_obtain_lock(void)
{

5
src/cpu/x86/smm/smm_module_loader.c
View File

@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
#include <compiler.h>
#include <string.h>
#include <rmodule.h>
#include <cpu/x86/smm.h>
@ -47,7 +48,7 @@ struct smm_stub_params {
u32 fxsave_area;
u32 fxsave_area_size;
struct smm_runtime runtime;
} __attribute__ ((packed));
} __packed;
/*
* The stub is the entry point that sets up protected mode and stacks for each
@ -67,7 +68,7 @@ extern unsigned char _binary_smmstub_start[];
struct smm_entry_ins {
char jmp_rel;
uint16_t rel16;
} __attribute__ ((packed));
} __packed;
/*
* Place the entry instructions for num entries beginning at entry_start with

3
src/device/oprom/yabel/device.c
View File

@ -33,6 +33,7 @@
*****************************************************************************/
#include <compiler.h>
#include "device.h"
#include "compat/rtas.h"
#include <string.h>
@ -56,7 +57,7 @@ typedef struct {
u8 cfg_space_offset;
u64 address;
u64 size;
} __attribute__ ((__packed__)) assigned_address_t;
} __packed assigned_address_t;
#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
/* coreboot version */

7
src/device/oprom/yabel/device.h
View File

@ -36,6 +36,7 @@
#define DEVICE_LIB_H
#include <types.h>
#include <compiler.h>
#include <endian.h>
#include "compat/of.h"
#include "debug.h"
@ -62,7 +63,7 @@ typedef struct {
u16 bev; // Bootstrap Entry Vector
u16 reserved_2;
u16 sriv; // Static Resource Information Vector
} __attribute__ ((__packed__)) exp_header_struct_t;
} __packed exp_header_struct_t;
// a PCI Data Struct as defined in PCI 2.3 Spec Chapter 6.3.1.2
typedef struct {
@ -78,7 +79,7 @@ typedef struct {
u8 code_type;
u8 indicator;
u16 reserved_2;
} __attribute__ ((__packed__)) pci_data_struct_t;
} __packed pci_data_struct_t;
typedef struct {
u8 bus;
@ -116,7 +117,7 @@ typedef struct {
u64 address;
u64 address_offset;
u64 size;
} __attribute__ ((__packed__)) translate_address_t;
} __packed translate_address_t;
// array to store address translations for this
// device. Needed for faster address translation, so

3
src/device/oprom/yabel/pmm.h
View File

@ -35,6 +35,7 @@
#define _YABEL_PMM_H_
#include <types.h>
#include <compiler.h>
/* PMM Structure see PMM Spec Version 1.01 Chapter 3.1.1
* (search web for specspmm101.pdf)
@ -54,7 +55,7 @@ typedef struct {
* see interrupt.c) and the INT Handler will do the actual PMM work.
*/
u8 code[3];
} __attribute__ ((__packed__)) pmm_information_t;
} __packed pmm_information_t;
/* This function is used to setup the PMM struct in virtual memory
* at a certain offset */

3
src/drivers/elog/boot_count.c
View File

@ -18,6 +18,7 @@
#include <pc80/mc146818rtc.h>
#include <stddef.h>
#include <stdint.h>
#include <compiler.h>
#include <elog.h>
/*
@ -43,7 +44,7 @@ struct boot_count {
u16 signature;
u32 count;
u16 checksum;
} __attribute__ ((packed));
} __packed;
/* Read and validate boot count structure from CMOS */
static int boot_count_cmos_read(struct boot_count *bc)

5
src/drivers/elog/elog_internal.h
View File

@ -16,13 +16,14 @@
#ifndef ELOG_INTERNAL_H_
#define ELOG_INTERNAL_H_
#include <compiler.h>
/* ELOG header */
struct elog_header {
u32 magic;
u8 version;
u8 header_size;
u8 reserved[2];
} __attribute__ ((packed));
} __packed;
/* ELOG related constants */
#define ELOG_SIGNATURE 0x474f4c45 /* 'ELOG' */
@ -40,7 +41,7 @@ struct event_header {
u8 hour;
u8 minute;
u8 second;
} __attribute__ ((packed));
} __packed;
/* SMBIOS Type 15 related constants */
#define ELOG_HEADER_TYPE_OEM 0x88

7
src/drivers/elog/gsmi.c
View File

@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
#include <compiler.h>
#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
@ -33,17 +34,17 @@ struct gsmi_set_eventlog_param {
u32 data_ptr;
u32 data_len;
u32 type;
} __attribute__ ((packed));
} __packed;
struct gsmi_set_eventlog_type1 {
u16 type;
u32 instance;
} __attribute__ ((packed));
} __packed;
struct gsmi_clear_eventlog_param {
u32 percentage;
u32 data_type;
} __attribute__ ((packed));
} __packed;
/* Param is usually EBX, ret in EAX */
u32 gsmi_exec(u8 command, u32 *param)

2
src/drivers/i2c/tpm/cr50.c
View File

@ -57,7 +57,7 @@ struct tpm_inf_dev {
static struct tpm_inf_dev g_tpm_dev CAR_GLOBAL;
__attribute__ ((weak)) int tis_plat_irq_status(void)
__attribute__((weak)) int tis_plat_irq_status(void)
{
static int warning_displayed CAR_GLOBAL;

3
src/drivers/i2c/tpm/tis_atmel.c
View File

@ -14,6 +14,7 @@
#include <arch/early_variables.h>
#include <stdint.h>
#include <compiler.h>
#include <string.h>
#include <assert.h>
#include <commonlib/endian.h>
@ -33,7 +34,7 @@ struct tpm_output_header {
uint16_t tag;
uint32_t length;
uint32_t return_code;
} __attribute__ ((packed));
} __packed;
int tis_open(void)
{

2
src/drivers/intel/fsp1_0/fsp_util.c
View File

@ -66,7 +66,7 @@ void FspNotify (u32 Phase)
* Call the FSP to do memory init. The FSP doesn't return to this function.
* The FSP returns to the romstage_main_continue().
*/
void __attribute__ ((noreturn)) fsp_early_init (FSP_INFO_HEADER *fsp_ptr)
void __attribute__((noreturn)) fsp_early_init (FSP_INFO_HEADER *fsp_ptr)
{
FSP_FSP_INIT FspInitApi;
FSP_INIT_PARAMS FspInitParams;

3
src/drivers/intel/fsp1_0/fsp_util.h
View File

@ -16,6 +16,7 @@
#ifndef FSP_UTIL_H
#define FSP_UTIL_H
#include <compiler.h>
#include <chipset_fsp_util.h>
#include "fsp_values.h"
@ -71,7 +72,7 @@ struct mrc_data_container {
u32 mrc_checksum; // IP style checksum
u32 reserved; // For header alignment
u8 mrc_data[0]; // Variable size, platform/run time dependent.
} __attribute__ ((packed));
} __packed;
struct mrc_data_container *find_current_mrc_cache(void);

3
src/drivers/intel/fsp1_1/fsp_util.c
View File

@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
#include <compiler.h>
#include <bootstate.h>
#include <cbmem.h>
#include <console/console.h>
@ -185,7 +186,7 @@ BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY,
struct fsp_runtime {
uint32_t fih;
uint32_t hob_list;
} __attribute__((packed));
} __packed;
void fsp_set_runtime(FSP_INFO_HEADER *fih, void *hob_list)

19
src/drivers/intel/fsp1_1/include/fsp/gma.h
View File

@ -18,6 +18,7 @@
#define _GMA_H_
#include <types.h>
#include <compiler.h>
/* IGD PCI Configuration register */
#define ASLS 0xfc /* OpRegion Base */
@ -35,7 +36,7 @@ typedef struct {
u8 driver_version[16];
u32 mailboxes;
u8 reserved[164];
} __attribute__((packed)) opregion_header_t;
} __packed opregion_header_t;
#define IGD_OPREGION_SIGNATURE "IntelGraphicsMem"
#define IGD_OPREGION_VERSION 2
@ -72,7 +73,7 @@ typedef struct {
u32 cnot;
u32 nrdy;
u8 reserved2[60];
} __attribute__((packed)) opregion_mailbox1_t;
} __packed opregion_mailbox1_t;
/* mailbox 2: software sci interface */
typedef struct {
@ -80,7 +81,7 @@ typedef struct {
u32 parm;
u32 dslp;
u8 reserved[244];
} __attribute__((packed)) opregion_mailbox2_t;
} __packed opregion_mailbox2_t;
/* mailbox 3: power conservation */
typedef struct {
@ -99,7 +100,7 @@ typedef struct {
u32 ccdv;
u32 pcft;
u8 reserved[94];
} __attribute__((packed)) opregion_mailbox3_t;
} __packed opregion_mailbox3_t;
#define IGD_BACKLIGHT_BRIGHTNESS 0xff
#define IGD_INITIAL_BRIGHTNESS 0x64
@ -111,7 +112,7 @@ typedef struct {
/* mailbox 4: vbt */
typedef struct {
u8 gvd1[7168];
} __attribute__((packed)) opregion_vbt_t;
} __packed opregion_vbt_t;
/* IGD OpRegion */
typedef struct {
@ -120,7 +121,7 @@ typedef struct {
opregion_mailbox2_t mailbox2;
opregion_mailbox3_t mailbox3;
opregion_vbt_t vbt;
} __attribute__((packed)) igd_opregion_t;
} __packed igd_opregion_t;
/* Intel Video BIOS (Option ROM) */
typedef struct {
@ -129,7 +130,7 @@ typedef struct {
u8 reserved[21];
u16 pcir_offset;
u16 vbt_offset;
} __attribute__((packed)) optionrom_header_t;
} __packed optionrom_header_t;
#define OPROM_SIGNATURE 0xaa55
@ -146,7 +147,7 @@ typedef struct {
u8 codetype;
u8 indicator;
u16 reserved2;
} __attribute__((packed)) optionrom_pcir_t;
} __packed optionrom_pcir_t;
typedef struct {
u8 hdr_signature[20];
@ -170,7 +171,7 @@ typedef struct {
u8 coreblock_integratedhw;
u8 coreblock_biosbuild[4];
u8 coreblock_biossignon[155];
} __attribute__((packed)) optionrom_vbt_t;
} __packed optionrom_vbt_t;
#define VBT_SIGNATURE 0x54425624

3
src/drivers/intel/fsp2_0/graphics.c
View File

@ -10,6 +10,7 @@
* (at your option) any later version.
*/
#include <compiler.h>
#include <cbfs.h>
#include <console/console.h>
#include <fsp/util.h>
@ -37,7 +38,7 @@ struct hob_graphics_info {
uint32_t blue_mask;
uint32_t reserved_mask;
uint32_t pixels_per_scanline;
} __attribute__((packed));
} __packed;
struct pixel {
uint8_t pos;

3
src/drivers/intel/fsp2_0/hob_display.c
View File

@ -9,13 +9,14 @@
* (at your option) any later version.
*/
#include <compiler.h>
#include <console/console.h>
#include <fsp/util.h>
struct hob_type_name {
uint16_t type;
const char *name;
} __attribute__((packed));
} __packed;
static const struct hob_type_name hob_type_names[] = {
{ HOB_TYPE_HANDOFF, "HOB_TYPE_HANDOFF" },

6
src/drivers/intel/fsp2_0/include/fsp/upd.h
View File

@ -12,6 +12,8 @@
#ifndef _FSP2_0_UPD_H_
#define _FSP2_0_UPD_H_
#include <compiler.h>
struct FSP_UPD_HEADER {
///
/// UPD Region Signature. This signature will be
@ -26,7 +28,7 @@ struct FSP_UPD_HEADER {
///
uint8_t Revision;
uint8_t Reserved[23];
} __attribute__((packed));
} __packed;
struct FSPM_ARCH_UPD {
///
@ -59,6 +61,6 @@ struct FSPM_ARCH_UPD {
///
uint32_t BootMode;
uint8_t Reserved1[8];
} __attribute__((packed));
} __packed;
#endif /* _FSP2_0_UPD_H_ */

5
src/drivers/intel/fsp2_0/include/fsp/util.h
View File

@ -13,6 +13,7 @@
#ifndef _FSP2_0_UTIL_H_
#define _FSP2_0_UTIL_H_
#include <compiler.h>
#include <boot/coreboot_tables.h>
#include <commonlib/region.h>
#include <arch/cpu.h>
@ -23,7 +24,7 @@
struct hob_header {
uint16_t type;
uint16_t length;
} __attribute__((packed));
} __packed;
struct fsp_notify_params {
enum fsp_notify_phase phase;
@ -35,7 +36,7 @@ struct hob_resource {
uint32_t attribute_type;
uint64_t addr;
uint64_t length;
} __attribute__((packed));
} __packed;
enum resource_type {
EFI_RESOURCE_SYSTEM_MEMORY = 0,

5
src/drivers/intel/fsp2_0/memory_init.c
View File

@ -11,6 +11,7 @@
* (at your option) any later version.
*/
#include <compiler.h>
#include <antirollback.h>
#include <arch/io.h>
#include <arch/cpu.h>
@ -281,13 +282,13 @@ static enum cb_err fsp_fill_common_arch_params(FSPM_ARCH_UPD *arch_upd,
return CB_SUCCESS;
}
__attribute__ ((weak))
__attribute__((weak))
uint8_t fsp_memory_mainboard_version(void)
{
return 0;
}
__attribute__ ((weak))
__attribute__((weak))
uint8_t fsp_memory_soc_version(void)
{
return 0;

50
src/drivers/intel/gma/intel_bios.h
View File

@ -28,6 +28,8 @@
#ifndef _I830_BIOS_H_
#define _I830_BIOS_H_
#include <compiler.h>
struct vbt_header {
u8 signature[20]; /**< Always starts with 'VBT$' */
u16 version; /**< decimal */
@ -37,7 +39,7 @@ struct vbt_header {
u8 reserved0;
u32 bdb_offset; /**< from beginning of VBT */
u32 aim_offset[4]; /**< from beginning of VBT */
} __attribute__((packed));
} __packed;
struct bdb_header {
u8 signature[16]; /**< Always 'BIOS_DATA_BLOCK' */
@ -63,7 +65,7 @@ struct vbios_data {
u8 rsvd4; /* popup memory size */
u8 resize_pci_bios;
u8 rsvd5; /* is crt already on ddc2 */
} __attribute__((packed));
} __packed;
/*
* There are several types of BIOS data blocks (BDBs), each block has
@ -140,7 +142,7 @@ struct bdb_general_features {
u8 dp_ssc_enb:1; /* PCH attached eDP supports SSC */
u8 dp_ssc_freq:1; /* SSC freq for PCH attached eDP */
u8 rsvd11:3; /* finish byte */
} __attribute__((packed));
} __packed;
/* pre-915 */
#define GPIO_PIN_DVI_LVDS 0x03 /* "DVI/LVDS DDC GPIO pins" */
@ -223,7 +225,7 @@ struct old_child_dev_config {
u8 dvo2_wiring;
u16 extended_type;
u8 dvo_function;
} __attribute__((packed));
} __packed;
/* This one contains field offsets that are known to be common for all BDB
* versions. Notice that the meaning of the contents contents may still change,
@ -236,7 +238,7 @@ struct common_child_dev_config {
u8 not_common2[2];
u8 ddc_pin;
u16 edid_ptr;
} __attribute__((packed));
} __packed;
/* This field changes depending on the BDB version, so the most reliable way to
* read it is by checking the BDB version and reading the raw pointer. */
@ -277,7 +279,7 @@ struct bdb_general_definitions {
* sizeof(child_device_config);
*/
union child_device_config devices[0];
} __attribute__((packed));
} __packed;
struct bdb_lvds_options {
u8 panel_type;
@ -291,7 +293,7 @@ struct bdb_lvds_options {
u8 lvds_edid:1;
u8 rsvd2:1;
u8 rsvd4;
} __attribute__((packed));
} __packed;
/* LFP pointer table contains entries to the struct below */
struct bdb_lvds_lfp_data_ptr {
@ -301,12 +303,12 @@ struct bdb_lvds_lfp_data_ptr {
u8 dvo_table_size;
u16 panel_pnp_id_offset;
u8 pnp_table_size;
} __attribute__((packed));
} __packed;
struct bdb_lvds_lfp_data_ptrs {
u8 lvds_entries; /* followed by one or more lvds_data_ptr structs */
struct bdb_lvds_lfp_data_ptr ptr[16];
} __attribute__((packed));
} __packed;
/* LFP data has 3 blocks per entry */
struct lvds_fp_timing {
@ -323,7 +325,7 @@ struct lvds_fp_timing {
u32 pfit_reg;
u32 pfit_reg_val;
u16 terminator;
} __attribute__((packed));
} __packed;
struct lvds_dvo_timing {
u16 clock; /**< In 10khz */
@ -351,7 +353,7 @@ struct lvds_dvo_timing {
u8 vsync_positive:1;
u8 hsync_positive:1;
u8 rsvd2:1;
} __attribute__((packed));
} __packed;
struct lvds_pnp_id {
u16 mfg_name;
@ -359,17 +361,17 @@ struct lvds_pnp_id {
u32 serial;
u8 mfg_week;
u8 mfg_year;
} __attribute__((packed));
} __packed;
struct bdb_lvds_lfp_data_entry {
struct lvds_fp_timing fp_timing;
struct lvds_dvo_timing dvo_timing;
struct lvds_pnp_id pnp_id;
} __attribute__((packed));
} __packed;
struct bdb_lvds_lfp_data {
struct bdb_lvds_lfp_data_entry data[16];
} __attribute__((packed));
} __packed;
struct aimdb_header {
char signature[16];
@ -377,12 +379,12 @@ struct aimdb_header {
u16 aimdb_version;
u16 aimdb_header_size;
u16 aimdb_size;
} __attribute__((packed));
} __packed;
struct aimdb_block {
u8 aimdb_id;
u16 aimdb_size;
} __attribute__((packed));
} __packed;
struct vch_panel_data {
u16 fp_timing_offset;
@ -393,12 +395,12 @@ struct vch_panel_data {
u8 text_fitting_size;
u16 graphics_fitting_offset;
u8 graphics_fitting_size;
} __attribute__((packed));
} __packed;
struct vch_bdb_22 {
struct aimdb_block aimdb_block;
struct vch_panel_data panels[16];
} __attribute__((packed));
} __packed;
struct bdb_sdvo_lvds_options {
u8 panel_backlight;
@ -414,7 +416,7 @@ struct bdb_sdvo_lvds_options {
u8 panel_misc_bits_2;
u8 panel_misc_bits_3;
u8 panel_misc_bits_4;
} __attribute__((packed));
} __packed;
#define BDB_DRIVER_FEATURE_NO_LVDS 0
@ -460,7 +462,7 @@ struct bdb_driver_features {
u8 hdmi_termination;
u8 custom_vbt_version;
} __attribute__((packed));
} __packed;
#define EDP_18BPP 0
#define EDP_24BPP 1
@ -485,14 +487,14 @@ struct edp_power_seq {
u16 t9;
u16 t10;
u16 t11_t12;
} __attribute__ ((packed));
} __packed;
struct edp_link_params {
u8 rate:4;
u8 lanes:4;
u8 preemphasis:4;
u8 vswing:4;
} __attribute__ ((packed));
} __packed;
struct bdb_edp {
struct edp_power_seq power_seqs[16];
@ -503,7 +505,7 @@ struct bdb_edp {
/* ith bit indicates enabled/disabled for (i+1)th panel */
u16 edp_s3d_feature;
u16 edp_t3_optimization;
} __attribute__ ((packed));
} __packed;
/*
* Driver<->VBIOS interaction occurs through scratch bits in
@ -728,7 +730,7 @@ struct bdb_mipi {
u32 hl_switch_cnt;
u32 lp_byte_clk;
u32 clk_lane_switch_cnt;
} __attribute__((packed));
} __packed;
#define VBT_SIGNATURE 0x54425624

21
src/drivers/intel/gma/opregion.h
View File

@ -19,6 +19,7 @@
#define _COMMON_GMA_H_
#include <types.h>
#include <compiler.h>
#include <commonlib/helpers.h>
/* IGD PCI Configuration register */
@ -40,7 +41,7 @@ typedef struct {
u32 pcon; /* Offset 96 Platform Capabilities */
u16 dver[16]; /* Offset 100 GOP Version */
u8 reserved[124]; /* Offset 132 Reserved */
} __attribute__((packed)) opregion_header_t;
} __packed opregion_header_t;
#define IGD_OPREGION_SIGNATURE "IntelGraphicsMem"
#define IGD_OPREGION_VERSION 2
@ -121,7 +122,7 @@ typedef struct {
u32 cp14; /* Offset 244 Extended Currently present device 6 */
u32 cp15; /* Offset 248 Extended Currently present device 7 */
u8 reserved2[4]; /* Offset 252 Reserved 4 bytes */
} __attribute__((packed)) opregion_mailbox1_t;
} __packed opregion_mailbox1_t;
/* mailbox 2: software sci interface */
typedef struct {
@ -129,7 +130,7 @@ typedef struct {
u32 parm; /* Offset 4 Software SCI function number parameters */
u32 dslp; /* Offset 8 Driver sleep timeout */
u8 reserved[244]; /* Offset 12 Reserved */
} __attribute__((packed)) opregion_mailbox2_t;
} __packed opregion_mailbox2_t;
/* mailbox 3: power conservation */
typedef struct {
@ -163,7 +164,7 @@ typedef struct {
* Size of Raw VBT data
*/
u8 reserved[58]; /* Offset 198 Reserved */
} __attribute__((packed)) opregion_mailbox3_t;
} __packed opregion_mailbox3_t;
#define IGD_BACKLIGHT_BRIGHTNESS 0xff
#define IGD_INITIAL_BRIGHTNESS 0x64
@ -175,14 +176,14 @@ typedef struct {
/* mailbox 4: vbt */
typedef struct {
u8 gvd1[6*KiB];
} __attribute__((packed)) opregion_vbt_t;
} __packed opregion_vbt_t;
/* Mailbox 5: BIOS to Driver Notification Extension */
typedef struct {
u32 phed; /* Offset 7168 Panel Header */
u8 bddc[256]; /* Offset 7172 Panel EDID */
u8 reserved[764]; /* Offset 7428 764 bytes */
} __attribute__((packed)) opregion_mailbox5_t;
} __packed opregion_mailbox5_t;
/* IGD OpRegion */
typedef struct {
@ -193,7 +194,7 @@ typedef struct {
opregion_vbt_t vbt;
opregion_mailbox5_t mailbox5;
} __attribute__((packed)) igd_opregion_t;
} __packed igd_opregion_t;
/* Intel Video BIOS (Option ROM) */
typedef struct {
@ -202,7 +203,7 @@ typedef struct {
u8 reserved[21];
u16 pcir_offset;
u16 vbt_offset;
} __attribute__((packed)) optionrom_header_t;
} __packed optionrom_header_t;
#define OPROM_SIGNATURE 0xaa55
@ -219,7 +220,7 @@ typedef struct {
u8 codetype;
u8 indicator;
u16 reserved2;
} __attribute__((packed)) optionrom_pcir_t;
} __packed optionrom_pcir_t;
typedef struct {
u8 hdr_signature[20];
@ -243,7 +244,7 @@ typedef struct {
u8 coreblock_integratedhw;
u8 coreblock_biosbuild[4];
u8 coreblock_biossignon[155];
} __attribute__((packed)) optionrom_vbt_t;
} __packed optionrom_vbt_t;
void intel_gma_opregion_register(uintptr_t opregion);
void intel_gma_restore_opregion(void);

5
src/drivers/intel/mipi_camera/chip.h
View File

@ -17,6 +17,7 @@
#define __INTEL_MIPI_CAMERA_CHIP_H__
#include <stdint.h>
#include <compiler.h>
#define MAX_PWDB_ENTRIES 12
@ -83,7 +84,7 @@ struct intel_ssdb {
uint8_t mipi_data_format; /* MIPI data format */
uint8_t silicon_version; /* Silicon version */
uint8_t customer_id; /* Customer ID */
} __attribute__((packed));
} __packed;
struct intel_pwdb {
char name[32]; /* Name of the resource required by the power
@ -92,7 +93,7 @@ struct intel_pwdb {
uint32_t entry_type; /* The type of the current power action */
uint32_t delay_usec; /* The delay time after which power action is
performed and this is in unit of usec */
} __attribute__((packed));
} __packed;
struct drivers_intel_mipi_camera_config {
struct intel_ssdb ssdb;

3
src/drivers/intel/wifi/wifi.c
View File

@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
#include <compiler.h>
#include <arch/acpi_device.h>
#include <arch/acpigen.h>
#include <console/console.h>
@ -36,7 +37,7 @@ static int smbios_write_wifi(struct device *dev, int *handle,
u16 handle;
u8 str;
char eos[2];
} __attribute__((packed));
} __packed;
struct smbios_type_intel_wifi *t =
(struct smbios_type_intel_wifi *)*current;

4
src/drivers/siemens/nc_fpga/nc_fpga.h
View File

@ -16,6 +16,8 @@
#ifndef _SIEMENS_NC_FPGA_H_
#define _SIEMENS_NC_FPGA_H_
#include <compiler.h>
#define NC_MAGIC_OFFSET 0x020
#define NC_FPGA_MAGIC 0x4E433746
#define NC_CAP1_OFFSET 0x080
@ -64,6 +66,6 @@ typedef struct {
uint16_t hystthreshold;
uint16_t res9[4];
uint32_t fanmon;
} __attribute__ ((packed)) fan_ctrl_t;
} __packed fan_ctrl_t;
#endif /* _SIEMENS_NC_FPGA_H_ */

8
src/drivers/usb/ehci.h
View File

@ -19,6 +19,8 @@
#ifndef EHCI_H
#define EHCI_H
#include <compiler.h>
/* EHCI register interface, corresponds to EHCI Revision 0.95 specification */
/* Section 2.2 Host Controller Capability Registers */
@ -52,7 +54,7 @@ struct ehci_caps {
#define HCC_PGM_FRAMELISTLEN(p) ((p)&(1 << 1)) /* true: periodic_size changes*/
#define HCC_64BIT_ADDR(p) ((p)&(1)) /* true: can use 64-bit addr */
u8 portroute[8]; /* nibbles for routing - offset 0xC */
} __attribute__ ((packed));
} __packed;
/* Section 2.3 Host Controller Operational Registers */
@ -148,7 +150,7 @@ struct ehci_regs {
#define PORT_CSC (1<<1) /* connect status change */
#define PORT_CONNECT (1<<0) /* device connected */
#define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC)
} __attribute__ ((packed));
} __packed;
#define USBMODE 0x68 /* USB Device mode */
#define USBMODE_SDIS (1<<3) /* Stream disable */
@ -192,7 +194,7 @@ struct ehci_dbg_port {
u32 data47;
u32 address;
#define DBGP_EPADDR(dev, ep) (((dev)<<8)|(ep))
} __attribute__ ((packed));
} __packed;
#define USB_DEBUG_DEVNUM 127

4
src/drivers/usb/usb_ch9.h
View File

@ -17,6 +17,8 @@
#ifndef USB_CH9_H
#define USB_CH9_H
#include <compiler.h>
#define USB_DIR_OUT 0 /* to device */
#define USB_DIR_IN 0x80 /* to host */
@ -111,7 +113,7 @@ struct usb_ctrlrequest {
u16 wValue;
u16 wIndex;
u16 wLength;
} __attribute__ ((packed));
} __packed;
struct usb_debug_descriptor {
u8 bLength;

4
src/include/bootstate.h
View File

@ -183,9 +183,9 @@ struct boot_state_init_entry {
};
#if ENV_RAMSTAGE
#define BOOT_STATE_INIT_ATTR __attribute__ ((used, section(".bs_init")))
#define BOOT_STATE_INIT_ATTR __attribute__((used, section(".bs_init")))
#else
#define BOOT_STATE_INIT_ATTR __attribute__ ((unused))
#define BOOT_STATE_INIT_ATTR __attribute__((unused))
#endif
#define BOOT_STATE_INIT_ENTRY(state_, when_, func_, arg_) \

28
src/include/compiler.h Normal file
View File

@ -0,0 +1,28 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2017 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __COMPILER_H__
#define __COMPILER_H__
#if defined(__WIN32) || defined(__WIN64)
#define __packed __attribute__((gcc_struct, packed))
#else
#define __packed __attribute__((packed))
#endif
#define __aligned(x) __attribute__((aligned(x)))
#define __always_unused __attribute__((unused))
#endif

2
src/include/console/console.h
View File

@ -40,7 +40,7 @@ void post_log_clear(void);
#endif
/* this function is weak and can be overridden by a mainboard function. */
void mainboard_post(u8 value);
void __attribute__ ((noreturn)) die(const char *msg);
void __attribute__((noreturn)) die(const char *msg);
#define __CONSOLE_ENABLE__ \
((ENV_BOOTBLOCK && IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE)) || \

5
src/include/console/spi.h
View File

@ -18,6 +18,7 @@
#include <rules.h>
#include <stdint.h>
#include <compiler.h>
void spiconsole_init(void);
void spiconsole_tx_byte(unsigned char c);
@ -59,12 +60,12 @@ struct em100_msg_header {
uint32_t msg_signature;
uint8_t msg_type;
uint8_t msg_length;
} __attribute__ ((packed));
} __packed;
struct em100_msg {
struct em100_msg_header header;
char data[MAX_MSG_LENGTH];
} __attribute__ ((packed));
} __packed;

2
src/include/cpu/cpu.h
View File

@ -10,7 +10,7 @@ void initialize_cpus(struct bus *cpu_bus);
asmlinkage void secondary_cpu_init(unsigned int cpu_index);
int cpu_phys_address_size(void);
#define __cpu_driver __attribute__ ((used, __section__(".rodata.cpu_driver")))
#define __cpu_driver __attribute__((used, __section__(".rodata.cpu_driver")))
#ifndef __SIMPLE_DEVICE__
/** start of compile time generated pci driver array */
extern struct cpu_driver _cpu_drivers[];

13
src/include/cpu/x86/smm.h
View File

@ -22,6 +22,7 @@
#include <arch/cpu.h>
#include <types.h>
#include <compiler.h>
#define SMM_DEFAULT_BASE 0x30000
#define SMM_DEFAULT_SIZE 0x10000
@ -129,7 +130,7 @@ typedef struct {
u64 rdx;
u64 rcx;
u64 rax;
} __attribute__((packed)) amd64_smm_state_save_area_t;
} __packed amd64_smm_state_save_area_t;
/* Intel Core 2 (EM64T) SMM State-Save Area
@ -211,7 +212,7 @@ typedef struct {
u64 cr3;
u64 cr0;
} __attribute__((packed)) em64t_smm_state_save_area_t;
} __packed em64t_smm_state_save_area_t;
/* Intel Revision 30100 SMM State-Save Area
@ -298,7 +299,7 @@ typedef struct {
u64 cr3;
u64 cr0;
} __attribute__((packed)) em64t100_smm_state_save_area_t;
} __packed em64t100_smm_state_save_area_t;
/* Intel Revision 30101 SMM State-Save Area
* The following processor architectures use this:
@ -397,7 +398,7 @@ typedef struct {
u64 cr3;
u64 cr0;
} __attribute__((packed)) em64t101_smm_state_save_area_t;
} __packed em64t101_smm_state_save_area_t;
/* Legacy x86 SMM State-Save Area
@ -438,7 +439,7 @@ typedef struct {
u32 eflags;
u32 cr3;
u32 cr0;
} __attribute__((packed)) legacy_smm_state_save_area_t;
} __packed legacy_smm_state_save_area_t;
typedef enum {
AMD64,
@ -514,7 +515,7 @@ struct smm_runtime {
* contiguous like the 1:1 mapping it is up to the caller of the stub
* loader to adjust this mapping. */
u8 apic_id_to_cpu[CONFIG_MAX_CPUS];
} __attribute__ ((packed));
} __packed;
struct smm_module_params {
void *arg;

2
src/include/device/pci.h
View File

@ -57,7 +57,7 @@ struct pci_driver {
const unsigned short *devices;
};
#define __pci_driver __attribute__ ((used, __section__(".rodata.pci_driver")))
#define __pci_driver __attribute__((used, __section__(".rodata.pci_driver")))
/** start of compile time generated pci driver array */
extern struct pci_driver _pci_drivers[];
/** end of compile time generated pci driver array */

8
src/include/elog.h
View File

@ -16,6 +16,8 @@
#ifndef ELOG_H_
#define ELOG_H_
#include <compiler.h>
/* SMI command code for GSMI event logging */
#define ELOG_GSMI_APM_CNT 0xEF
@ -151,7 +153,7 @@
struct elog_event_data_wake {
u8 source;
u32 instance;
} __attribute__ ((packed));
} __packed;
/* Chrome OS related events */
#define ELOG_TYPE_CROS_DEVELOPER_MODE 0xa0
@ -169,7 +171,7 @@ struct elog_event_data_me_extended {
u8 progress_code;
u8 current_pmevent;
u8 current_state;
} __attribute__ ((packed));
} __packed;
/* Last post code from previous boot */
#define ELOG_TYPE_LAST_POST_CODE 0xa3
@ -195,7 +197,7 @@ struct elog_event_data_me_extended {
struct elog_event_mem_cache_update {
u8 slot;
u8 status;
} __attribute__ ((packed));
} __packed;
/* CPU Thermal Trip */
#define ELOG_TYPE_THERM_TRIP 0xab

5
src/include/memory_info.h
View File

@ -17,6 +17,7 @@
#define _MEMORY_INFO_H_
#include <stdint.h>
#include <compiler.h>
/*
* If this table is filled and put in CBMEM,
@ -37,12 +38,12 @@ struct dimm_info {
uint16_t mod_id;
uint8_t mod_type;
uint8_t bus_width;
} __attribute__((packed));
} __packed;
struct memory_info {
uint8_t dimm_cnt;
/* Maximum num of dimm is 8 */
struct dimm_info dimm[8];
} __attribute__((packed));
} __packed;
#endif

2
src/include/reg_script.h
View File

@ -107,7 +107,7 @@ struct reg_script_bus_entry {
void (*reg_script_write)(struct reg_script_context *ctx);
};
#define REG_SCRIPT_TABLE_ATTRIBUTE __attribute__ ((used, section(".rsbe_init")))
#define REG_SCRIPT_TABLE_ATTRIBUTE __attribute__((used, section(".rsbe_init")))
#define REG_SCRIPT_BUS_ENTRY(bus_entry_) \
const struct reg_script_bus_entry *rsbe_ ## bus_entry_ \

29
src/include/smbios.h
View File

@ -19,6 +19,7 @@
#define SMBIOS_H
#include <types.h>
#include <compiler.h>
unsigned long smbios_write_tables(unsigned long start);
int smbios_add_string(char *start, const char *str);
@ -230,7 +231,7 @@ struct smbios_entry {
u32 struct_table_address;
u16 struct_count;
u8 smbios_bcd_revision;
} __attribute__((packed));
} __packed;
struct smbios_type0 {
u8 type;
@ -249,7 +250,7 @@ struct smbios_type0 {
u8 ec_major_release;
u8 ec_minor_release;
char eos[2];
} __attribute__((packed));
} __packed;
struct smbios_type1 {
u8 type;
@ -264,7 +265,7 @@ struct smbios_type1 {
u8 sku;
u8 family;
char eos[2];
} __attribute__((packed));
} __packed;
struct smbios_type2 {
u8 type;
@ -275,7 +276,7 @@ struct smbios_type2 {
u8 version;
u8 serial_number;
char eos[2];
} __attribute__((packed));
} __packed;
enum {
SMBIOS_ENCLOSURE_OTHER = 0x01,
@ -336,7 +337,7 @@ struct smbios_type3 {
u8 element_record_length;
u8 sku_number;
char eos[2];
} __attribute__((packed));
} __packed;
struct smbios_type4 {
u8 type;
@ -366,7 +367,7 @@ struct smbios_type4 {
u16 processor_characteristics;
u16 processor_family2;
char eos[2];
} __attribute__((packed));
} __packed;
struct smbios_type11 {
u8 type;
@ -374,7 +375,7 @@ struct smbios_type11 {
u16 handle;
u8 count;
char eos[2];
} __attribute__((packed));
} __packed;
struct smbios_type15 {
u8 type;
@ -391,7 +392,7 @@ struct smbios_type15 {
u8 log_type_descriptors;
u8 log_type_descriptor_length;
char eos[2];
} __attribute__((packed));
} __packed;
enum {
SMBIOS_EVENTLOG_ACCESS_METHOD_IO8 = 0,
@ -418,7 +419,7 @@ struct smbios_type16 {
u16 number_of_memory_devices;
u64 extended_maximum_capacity;
char eos[2];
} __attribute__((packed));
} __packed;
struct smbios_type17 {
u8 type;
@ -447,7 +448,7 @@ struct smbios_type17 {
u16 maximum_voltage;
u16 configured_voltage;
char eos[2];
} __attribute__((packed));
} __packed;
struct smbios_type32 {
u8 type;
@ -456,7 +457,7 @@ struct smbios_type32 {
u8 reserved[6];
u8 boot_status;
u8 eos[2];
} __attribute__((packed));
} __packed;
struct smbios_type38 {
u8 type;
@ -469,7 +470,7 @@ struct smbios_type38 {
u64 base_address;
u8 base_address_modifier;
u8 irq;
} __attribute__((packed));
} __packed;
typedef enum {
SMBIOS_DEVICE_TYPE_OTHER = 0x01,
@ -497,14 +498,14 @@ struct smbios_type41 {
u8 function_number: 3;
u8 device_number: 5;
char eos[2];
} __attribute__((packed));
} __packed;
struct smbios_type127 {
u8 type;
u8 length;
u16 handle;
u8 eos[2];
} __attribute__((packed));
} __packed;
void smbios_fill_dimm_manufacturer_from_id(uint16_t mod_id,
struct smbios_type17 *t);

6
src/include/trace.h
View File

@ -28,16 +28,16 @@
#if CONFIG_TRACE && !defined(__SMM__)
void __cyg_profile_func_enter(void *, void *)
__attribute__ ((no_instrument_function));
__attribute__((no_instrument_function));
void __cyg_profile_func_exit(void *, void *)
__attribute__ ((no_instrument_function));
__attribute__((no_instrument_function));
extern volatile int trace_dis;
#define DISABLE_TRACE do { trace_dis = 1; } while (0);
#define ENABLE_TRACE do { trace_dis = 0; } while (0);
#define DISABLE_TRACE_ON_FUNCTION __attribute__ ((no_instrument_function));
#define DISABLE_TRACE_ON_FUNCTION __attribute__((no_instrument_function));
#else /* !CONFIG_TRACE */

7
src/include/vbe.h
View File

@ -13,6 +13,7 @@
#ifndef VBE_H
#define VBE_H
#include <compiler.h>
#include <boot/coreboot_tables.h>
// these structs are for input from and output to OF
typedef struct {
@ -24,7 +25,7 @@ typedef struct {
u8 color_depth; // color depth in bits per pixel
u32 framebuffer_address;
u8 edid_block_zero[128];
} __attribute__ ((__packed__)) screen_info_t;
} __packed screen_info_t;
typedef struct {
u8 signature[4];
@ -32,7 +33,7 @@ typedef struct {
u8 monitor_number;
u16 max_screen_width;
u8 color_depth;
} __attribute__ ((__packed__)) screen_info_input_t;
} __packed screen_info_input_t;
// these structs only store a subset of the VBE defined fields
// only those needed.
@ -80,7 +81,7 @@ typedef struct {
u32 offscreen_mem_offset;
u16 offscreen_mem_size;
u8 reserved[206];
} __attribute__ ((__packed__)) vesa_mode_info_t;
} __packed vesa_mode_info_t;
typedef struct {
u16 video_mode;

3
src/lib/cbmem_console.c
View File

@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
#include <compiler.h>
#include <console/console.h>
#include <console/cbmem_console.h>
#include <console/uart.h>
@ -43,7 +44,7 @@ struct cbmem_console {
u32 size;
u32 cursor;
u8 body[0];
} __attribute__ ((__packed__));
} __packed;
#define MAX_SIZE (1 << 28) /* can't be changed without breaking readers! */
#define CURSOR_MASK (MAX_SIZE - 1) /* bits 31-28 are reserved for flags */

26
src/lib/gcov-io.h
View File

@ -181,29 +181,29 @@ permissions described in the GCC Runtime Library Exception, version
/* About the target */
#if BITS_PER_UNIT == 8
typedef unsigned int gcov_unsigned_t __attribute__ ((mode(SI)));
typedef unsigned int gcov_position_t __attribute__ ((mode(SI)));
typedef unsigned int gcov_unsigned_t __attribute__((mode(SI)));
typedef unsigned int gcov_position_t __attribute__((mode(SI)));
#if LONG_LONG_TYPE_SIZE > 32
typedef signed gcov_type __attribute__ ((mode(DI)));
typedef signed gcov_type __attribute__((mode(DI)));
#else
typedef signed gcov_type __attribute__ ((mode(SI)));
typedef signed gcov_type __attribute__((mode(SI)));
#endif
#else
#if BITS_PER_UNIT == 16
typedef unsigned int gcov_unsigned_t __attribute__ ((mode(HI)));
typedef unsigned int gcov_position_t __attribute__ ((mode(HI)));
typedef unsigned int gcov_unsigned_t __attribute__((mode(HI)));
typedef unsigned int gcov_position_t __attribute__((mode(HI)));
#if LONG_LONG_TYPE_SIZE > 32
typedef signed gcov_type __attribute__ ((mode(SI)));
typedef signed gcov_type __attribute__((mode(SI)));
#else
typedef signed gcov_type __attribute__ ((mode(HI)));
typedef signed gcov_type __attribute__((mode(HI)));
#endif
#else
typedef unsigned int gcov_unsigned_t __attribute__ ((mode(QI)));
typedef unsigned int gcov_position_t __attribute__ ((mode(QI)));
typedef unsigned int gcov_unsigned_t __attribute__((mode(QI)));
typedef unsigned int gcov_position_t __attribute__((mode(QI)));
#if LONG_LONG_TYPE_SIZE > 32
typedef signed gcov_type __attribute__ ((mode(HI)));
typedef signed gcov_type __attribute__((mode(HI)));
#else
typedef signed gcov_type __attribute__ ((mode(QI)));
typedef signed gcov_type __attribute__((mode(QI)));
#endif
#endif
#endif
@ -270,7 +270,7 @@ typedef HOST_WIDEST_INT gcov_type;
#pragma GCC poison gcov_read_string gcov_sync gcov_time gcov_magic
#ifdef HAVE_GAS_HIDDEN
#define ATTRIBUTE_HIDDEN __attribute__ ((__visibility__("hidden")))
#define ATTRIBUTE_HIDDEN __attribute__((__visibility__("hidden")))
#else
#define ATTRIBUTE_HIDDEN
#endif

7
src/lib/imd.c
View File

@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
#include <compiler.h>
#include <assert.h>
#include <cbmem.h>
#include <console/console.h>
@ -32,7 +33,7 @@ struct imd_root_pointer {
uint32_t magic;
/* Relative to upper limit/offset. */
int32_t root_offset;
} __attribute__((packed));
} __packed;
struct imd_entry {
uint32_t magic;
@ -40,7 +41,7 @@ struct imd_entry {
int32_t start_offset;
uint32_t size;
uint32_t id;
} __attribute__((packed));
} __packed;
struct imd_root {
uint32_t max_entries;
@ -50,7 +51,7 @@ struct imd_root {
/* Used for fixing the size of an imd. Relative to the root. */
int32_t max_offset;
struct imd_entry entries[0];
} __attribute__((packed));
} __packed;
#define IMD_FLAG_LOCKED 1

18
src/lib/libgcov.c
View File

@ -73,23 +73,23 @@ typedef s32 pid_t;
/* If libc and its header files are not available, provide dummy functions. */
#ifdef L_gcov
void __gcov_init(struct gcov_info *p __attribute__ ((unused))) {}
void __gcov_init(struct gcov_info *p __attribute__((unused))) {}
void __gcov_flush(void) {}
#endif
#ifdef L_gcov_merge_add
void __gcov_merge_add(gcov_type *counters __attribute__ ((unused)),
unsigned int n_counters __attribute__ ((unused))) {}
void __gcov_merge_add(gcov_type *counters __attribute__((unused)),
unsigned int n_counters __attribute__((unused))) {}
#endif
#ifdef L_gcov_merge_single
void __gcov_merge_single(gcov_type *counters __attribute__ ((unused)),
unsigned int n_counters __attribute__ ((unused))) {}
void __gcov_merge_single(gcov_type *counters __attribute__((unused)),
unsigned int n_counters __attribute__((unused))) {}
#endif
#ifdef L_gcov_merge_delta
void __gcov_merge_delta(gcov_type *counters __attribute__ ((unused)),
unsigned int n_counters __attribute__ ((unused))) {}
void __gcov_merge_delta(gcov_type *counters __attribute__((unused)),
unsigned int n_counters __attribute__((unused))) {}
#endif
#else
@ -102,8 +102,8 @@ void __gcov_merge_delta(gcov_type *counters __attribute__ ((unused)),
#include <sys/stat.h>
#endif
#else
void __gcov_merge_add(gcov_type *counters __attribute__ ((unused)),
unsigned int n_counters __attribute__ ((unused))) {}
void __gcov_merge_add(gcov_type *counters __attribute__((unused)),
unsigned int n_counters __attribute__((unused))) {}
#endif /* __COREBOOT__ */
#ifdef L_gcov

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