Move init.S to a proper filename
Also, remove unnecessary junk and prepare for future build changes. Change-Id: I143777ec7e67ea4d6fed00084aafcb94c7866b4d Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2141 Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: build bot (Jenkins)
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@ -149,7 +149,7 @@ CFLAGS += \
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# For various headers imported from Linux
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CFLAGS += -D__LINUX_ARM_ARCH__=7
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crt0s = $(src)/arch/armv7/init.S
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crt0s = $(src)/arch/armv7/bootblock.inc
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ldscripts =
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ldscripts += $(src)/arch/armv7/romstage.ld
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@ -15,8 +15,8 @@
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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@ -31,26 +31,25 @@
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#include <system.h>
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_bl1:
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/* For now we have to live with a first stage boot loader
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* on ARM, which is 8KB in size and it is prepended to the
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* reset vector
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*/
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/* this comes a bit later. */
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// .skip 8192
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.globl _start
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_start: b reset
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ldr pc, _undefined_instruction
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ldr pc, _software_interrupt
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ldr pc, _prefetch_abort
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ldr pc, _data_abort
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ldr pc, _not_used
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ldr pc, _irq
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ldr pc, _fiq
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_undefined_instruction: .word _undefined_instruction
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_software_interrupt: .word _software_interrupt
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_prefetch_abort: .word _prefetch_abort
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_data_abort: .word _data_abort
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_not_used: .word _not_used
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_irq: .word _irq
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_fiq: .word _fiq
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_pad: .word 0x12345678 /* now 16*4=64 */
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.balignl 16,0xdeadbeef
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_cbfs_master_header:
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/* The CBFS master header is inserted here by cbfstool
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* when coreboot.rom is being created. Hence, we leave
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* some space for it.
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*/
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.skip 64
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reset:
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/*
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* set the cpu to SVC32 mode
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@ -71,22 +70,22 @@ reset:
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cmp r1, #0
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bne wait_for_interrupt @ If this is not core0, wait
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/* Set V=0 in CP15 SCTRL register - for VBAR to point to vector */
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mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTRL Register
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bic r0, #CR_V @ V = 0
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mcr p15, 0, r0, c1, c0, 0 @ Write CP15 SCTRL Register
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/* Set vector address in CP15 VBAR register */
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ldr r0, =_start
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mcr p15, 0, r0, c12, c0, 0 @Set VBAR
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/* Set stackpointer in internal RAM to call board_init_f */
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call_board_init_f:
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ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
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mov sp, r0
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call_bootblock:
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ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) /* Set up stack pointer */
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bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
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ldr r0,=0x00000000
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/*
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* Use "bl" instead of "b" even though we do not intend to return.
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* "bl" gets compiled to "blx" if we're transitioning from ARM to
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* Thumb. However, "b" will not and GCC may attempt to create a
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* wrapper which is currently broken.
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*/
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/* for now call board_init_f; change later. We're trying to get as much into ToT as
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* we can
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*/
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bl board_init_f
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bl main
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wait_for_interrupt:
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wfi
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