soc/mediatek/mt8195: Add clk_buf driver
Both mt8192 and mt8195 use mt6359p clk_buf. But mt8195 clk_buf uses legacy co-clock mode without srclken_rc. Signed-off-by: Yuchen Huang <yuchen.huang@mediatek.corp-partner.google.com> Change-Id: Ie9ee91449a7a14e77231493f807b321b2dbaa6a6 Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/53896 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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@ -1,6 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <arch/stages.h>
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#include <soc/clkbuf.h>
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#include <soc/mt6315.h>
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#include <soc/mt6359p.h>
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#include <soc/pmif.h>
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@ -10,4 +11,5 @@ void platform_romstage_main(void)
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mtk_pmif_init();
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mt6359p_init();
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mt6315_init();
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clk_buf_init();
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}
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@ -5,8 +5,9 @@
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#include <device/mmio.h>
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#include <soc/clkbuf.h>
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#include <soc/pmif.h>
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#if CONFIG(SRCLKEN_RC_SUPPORT)
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#include <soc/srclken_rc.h>
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#endif
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#define BUFTAG "[CLKBUF]"
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#define buf_info(fmt, arg ...) printk(BIOS_INFO, BUFTAG "%s,%d: " fmt, \
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@ -1,7 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef SOC_MEDIATEK_MT8192_CLKBUF_H
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#define SOC_MEDIATEK_MT8192_CLKBUF_H
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#ifndef SOC_MEDIATEK_COMMON_CLKBUF_H
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#define SOC_MEDIATEK_COMMON_CLKBUF_H
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#include <device/mmio.h>
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@ -66,4 +66,4 @@ DEFINE_BITFIELD(PMIC_RG_XO_VOTE, 10, 0)
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int clk_buf_init(void);
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#endif /* SOC_MEDIATEK_MT8192_CLKBUF_H */
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#endif /* SOC_MEDIATEK_COMMON_CLKBUF_H */
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@ -23,7 +23,7 @@ verstage-y += ../common/uart.c
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romstage-y += ../common/auxadc.c
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romstage-y += ../common/cbmem.c
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romstage-y += clkbuf.c srclken_rc.c
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romstage-y += ../common/clkbuf.c srclken_rc.c
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romstage-y += ../common/dram_init.c
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romstage-y += ../common/dramc_param.c
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romstage-y += ../common/flash_controller.c
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@ -20,6 +20,7 @@ verstage-y += ../common/uart.c
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verstage-y += ../common/wdt.c
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romstage-y += ../common/cbmem.c
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romstage-y += ../common/clkbuf.c
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romstage-y += emi.c
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romstage-y += ../common/flash_controller.c
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romstage-y += ../common/gpio.c gpio.c
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