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soc/intel/baytrail: add LPEA resources to southcluster.asl 

The LPEA device memory resources, required by Windows drivers,
were not being set.  Allocate required resources using
soc/intel/braswell/acpi/southcluster.asl as a reference.

This patch alone is not sufficient for working audio under Windows
on Baytrail ChromeOS devices, but it is a necessary component.

Test: boot Windows 10 on google/swanky, observe LPEA device working properly.

Change-Id: I7994d9b2c6e134c01b05cd7c61d309b6ba6e88e5
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48745
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Matt DeVillier 2020-12-18 19:05:09 -06:00 committed by Patrick Georgi
parent 33a68e4676
commit 6a7b707d11
1 changed files with 28 additions and 5 deletions
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33
src/soc/intel/baytrail/acpi/southcluster.asl
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@ -136,11 +136,17 @@ Name (MCRS, ResourceTemplate()
0x00000000, 0x000f0000, 0x000fffff, 0x00000000,
0x00010000,,, FSEG)
// PCI Memory Region (Top of memory-CONFIG_MMCONF_BASE_ADDRESS)
// LPEA Memory Region (0x20000000-0x201FFFFF)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite,
0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000,,, PMEM)
0x00000000,,, LMEM)
// PCI Memory Region (Top of memory-CONFIG_MMCONF_BASE_ADDRESS)
DwordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite,
0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000,,, PMEM)
// TPM Area (0xfed40000-0xfed44fff)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
@ -152,10 +158,27 @@ Name (MCRS, ResourceTemplate()
Method (_CRS, 0, Serialized)
{
/* Update LPEA resource area */
CreateDWordField (MCRS, ^LMEM._MIN, LMIN)
CreateDWordField (MCRS, ^LMEM._MAX, LMAX)
CreateDWordField (MCRS, ^LMEM._LEN, LLEN)
If (LAnd (LNotEqual (LPFW, Zero), LEqual (LPEN, One)))
{
Store (LPFW, LMIN)
Store (0x00100000, LLEN)
Subtract (Add (LMIN, LLEN), One, LMAX)
}
Else
{
Store (Zero, LMIN)
Store (Zero, LMAX)
Store (Zero, LLEN)
}
/* Update PCI resource area */
CreateDwordField(MCRS, ^PMEM._MIN, PMIN)
CreateDwordField(MCRS, ^PMEM._MAX, PMAX)
CreateDwordField(MCRS, ^PMEM._LEN, PLEN)
CreateDWordField (MCRS, ^PMEM._MIN, PMIN)
CreateDWordField (MCRS, ^PMEM._MAX, PMAX)
CreateDWordField (MCRS, ^PMEM._LEN, PLEN)
/* TOLM is BMBOUND accessible from IOSF so is saved in NVS */
Store (\TOLM, PMIN)