soc/intel/baytrail: add LPEA resources to southcluster.asl
The LPEA device memory resources, required by Windows drivers, were not being set. Allocate required resources using soc/intel/braswell/acpi/southcluster.asl as a reference. This patch alone is not sufficient for working audio under Windows on Baytrail ChromeOS devices, but it is a necessary component. Test: boot Windows 10 on google/swanky, observe LPEA device working properly. Change-Id: I7994d9b2c6e134c01b05cd7c61d309b6ba6e88e5 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48745 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -136,8 +136,14 @@ Name (MCRS, ResourceTemplate()
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0x00000000, 0x000f0000, 0x000fffff, 0x00000000,
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0x00000000, 0x000f0000, 0x000fffff, 0x00000000,
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0x00010000,,, FSEG)
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0x00010000,,, FSEG)
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// PCI Memory Region (Top of memory-CONFIG_MMCONF_BASE_ADDRESS)
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// LPEA Memory Region (0x20000000-0x201FFFFF)
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DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
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DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000,,, LMEM)
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// PCI Memory Region (Top of memory-CONFIG_MMCONF_BASE_ADDRESS)
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DwordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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Cacheable, ReadWrite,
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000,,, PMEM)
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0x00000000,,, PMEM)
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@ -152,10 +158,27 @@ Name (MCRS, ResourceTemplate()
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Method (_CRS, 0, Serialized)
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Method (_CRS, 0, Serialized)
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{
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{
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/* Update LPEA resource area */
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CreateDWordField (MCRS, ^LMEM._MIN, LMIN)
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CreateDWordField (MCRS, ^LMEM._MAX, LMAX)
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CreateDWordField (MCRS, ^LMEM._LEN, LLEN)
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If (LAnd (LNotEqual (LPFW, Zero), LEqual (LPEN, One)))
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{
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Store (LPFW, LMIN)
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Store (0x00100000, LLEN)
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Subtract (Add (LMIN, LLEN), One, LMAX)
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}
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Else
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{
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Store (Zero, LMIN)
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Store (Zero, LMAX)
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Store (Zero, LLEN)
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}
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/* Update PCI resource area */
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/* Update PCI resource area */
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CreateDwordField(MCRS, ^PMEM._MIN, PMIN)
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CreateDWordField (MCRS, ^PMEM._MIN, PMIN)
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CreateDwordField(MCRS, ^PMEM._MAX, PMAX)
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CreateDWordField (MCRS, ^PMEM._MAX, PMAX)
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CreateDwordField(MCRS, ^PMEM._LEN, PLEN)
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CreateDWordField (MCRS, ^PMEM._LEN, PLEN)
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/* TOLM is BMBOUND accessible from IOSF so is saved in NVS */
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/* TOLM is BMBOUND accessible from IOSF so is saved in NVS */
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Store (\TOLM, PMIN)
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Store (\TOLM, PMIN)
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