add k8 processor name handling as required by the k8 revision guide.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2322 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
parent
f560285bd5
commit
6ab0fa9fed
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@ -15,3 +15,4 @@ dir /cpu/amd/microcode
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driver model_fxx_init.o
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object apic_timer.o
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object model_fxx_update_microcode.o
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object processor_name.o
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@ -425,6 +425,7 @@ static inline void k8_errata(void)
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extern void model_fxx_update_microcode(unsigned cpu_deviceid);
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int init_processor_name(void);
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void model_fxx_init(device_t dev)
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{
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@ -454,6 +455,8 @@ void model_fxx_init(device_t dev)
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k8_errata();
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init_processor_name();
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enable_cache();
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/* Enable the local cpu apics */
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@ -0,0 +1,191 @@
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/*
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* processor_name.c
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*
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* This code sets the Processor Name String for AMD64 CPUs.
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*
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* Written by Stefan Reinauer <stepan@coresystems.de> using
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* the Revision Guide for AMD Athlon™ 64 and AMD Opteron™ Processors
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* Document ID 25759 Rev 3.59, April 2006 (Public Version)
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*
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* (C) 2006 by coresystems GmbH <info@coresystems.de>
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*
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*/
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#include <console/console.h>
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#include <string.h>
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#include <cpu/x86/msr.h>
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typedef unsigned int u32;
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/* The maximum length of CPU names is 48 bytes, including the final NULL byte.
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* If you change these names your BIOS will _NOT_ pass the AMD validation and
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* your mainboard will not be posted on the AMD Recommended Motherboard Website
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*/
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static char *processor_names[]={
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/* 0x00 */ "AMD Engineering Sample",
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/* 0x01-0x03 */ NULL, NULL, NULL,
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/* 0x04 */ "AMD Athlon(tm) 64 Processor XX00+",
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/* 0x05 */ "AMD Athlon(tm) 64 X2 Dual Core Processor XX00+",
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/* 0x06-0x07 */ NULL, NULL,
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/* 0x08 */ "Mobile AMD Athlon(tm) 64 Processor XX00+",
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/* 0x09 */ "Mobile AMD Athlon(tm) 64 Processor XX00+",
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/* 0x0A */ "AMD Turion(tm) 64 Mobile Technology ML-XX",
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/* 0x0B */ "AMD Turion(tm) 64 Mobile Technology MT-XX",
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/* 0x0C */ "AMD Opteron(tm) Processor 1YY",
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/* 0x0D */ "AMD Opteron(tm) Processor 1YY",
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/* 0x0E */ "AMD Opteron(tm) Processor 1YY HE",
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/* 0x0F */ "AMD Opteron(tm) Processor 1YY EE",
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/* 0x10 */ "AMD Opteron(tm) Processor 2YY",
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/* 0x11 */ "AMD Opteron(tm) Processor 2YY",
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/* 0x12 */ "AMD Opteron(tm) Processor 2YY HE",
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/* 0x13 */ "AMD Opteron(tm) Processor 2YY EE",
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/* 0x14 */ "AMD Opteron(tm) Processor 8YY",
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/* 0x15 */ "AMD Opteron(tm) Processor 8YY",
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/* 0x16 */ "AMD Opteron(tm) Processor 8YY HE",
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/* 0x17 */ "AMD Opteron(tm) Processor 8YY EE",
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/* 0x18 */ "AMD Athlon(tm) 64 Processor VV00+",
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/* 0x19-0x1C */ NULL, NULL, NULL, NULL,
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/* 0x1D */ "Mobile AMD Athlon(tm) XP-M Processor XX00+",
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/* 0x1E */ "Mobile AMD Athlon(tm) XP-M Processor XX00+",
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/* 0x1F */ NULL,
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/* 0x20 */ "AMD Athlon(tm) XP Processor XX00+",
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/* 0x21 */ "Mobile AMD Sempron(tm) Processor TT00+",
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/* 0x22 */ "AMD Sempron(tm) Processor TT00+",
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/* 0x23 */ "Mobile AMD Sempron(tm) Processor TT00+",
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/* 0x24 */ "AMD Athlon(tm) 64 FX-ZZ Processor",
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/* 0x25 */ NULL,
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/* 0x26 */ "AMD Sempron(tm) Processor TT00+",
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/* 0x27-0x28 */ NULL, NULL,
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/* 0x29 */ "Dual Core AMD Opteron(tm) Processor 1RR SE",
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/* 0x2A */ "Dual Core AMD Opteron(tm) Processor 2RR SE",
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/* 0x2B */ "Dual Core AMD Opteron(tm) Processor 8RR SE",
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/* 0x2C */ "Dual Core AMD Opteron(tm) Processor 1RR",
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/* 0x2D */ "Dual Core AMD Opteron(tm) Processor 1RR",
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/* 0x2E */ "Dual Core AMD Opteron(tm) Processor 1RR HE",
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/* 0x2F */ "Dual Core AMD Opteron(tm) Processor 1RR EE",
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/* 0x30 */ "Dual Core AMD Opteron(tm) Processor 2RR",
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/* 0x31 */ "Dual Core AMD Opteron(tm) Processor 2RR",
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/* 0x32 */ "Dual Core AMD Opteron(tm) Processor 2RR HE",
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/* 0x33 */ "Dual Core AMD Opteron(tm) Processor 2RR EE",
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/* 0x34 */ "Dual Core AMD Opteron(tm) Processor 8RR",
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/* 0x35 */ "Dual Core AMD Opteron(tm) Processor 8RR",
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/* 0x36 */ "Dual Core AMD Opteron(tm) Processor 8RR HE",
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/* 0x37 */ "Dual Core AMD Opteron(tm) Processor 8RR EE",
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/* 0x38 */ "Dual Core AMD Opteron(tm) Processor 1RR",
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/* 0x39 */ "Dual Core AMD Opteron(tm) Processor 2RR",
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/* 0x3A */ "Dual Core AMD Opteron(tm) Processor 8RR"
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#define MAX_CPU_NUMBER 0x3A
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};
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/* wrmsr_amd() is from yhlu's changes to model_fxx_init.c */
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static inline void wrmsr_amd(unsigned index, msr_t msr)
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{
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__asm__ __volatile__ (
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"wrmsr"
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: /* No outputs */
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: "c" (index), "a" (msr.lo), "d" (msr.hi), "D" (0x9c5a203a)
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);
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}
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static inline unsigned int cpuid_ebx(unsigned int op)
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{
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unsigned int eax, ebx;
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__asm__("cpuid"
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: "=a" (eax), "=b" (ebx)
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: "0" (op)
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: "ecx", "edx" );
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return ebx;
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}
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static inline void strcpy(char *dst, char *src)
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{
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while (*src) *dst++ = *src++;
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}
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int init_processor_name(void)
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{
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u32 EightBitBrandId;
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u32 BrandId;
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u32 BrandTableIndex;
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u32 NN;
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u32 ModelNumber=0;
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msr_t progmsr;
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int i;
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char *processor_name_string=NULL;
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char program_string[48];
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unsigned int *program_values = (unsigned int *)program_string;
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/* Find out which CPU brand it is */
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EightBitBrandId = cpuid_ebx(0x00000001) & 0xff;
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BrandId = cpuid_ebx(0x80000001) & 0xffff;
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if(!EightBitBrandId && !BrandId) {
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BrandTableIndex = 0;
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NN = 0xffffff;
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} else if(!EightBitBrandId) {
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BrandTableIndex = (BrandId >> 6) & 0x3f; // BrandId[11:6]
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NN = BrandId & 0x3f; // // BrandId[6:0]
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} else {
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BrandTableIndex = EightBitBrandId >> (5-2) & 0xfc; // { 0b, 8BitBrandId[7:5], 00b }
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NN = EightBitBrandId & 0x1f; // 8BitBrandId[4:0]
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}
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/* Look up the CPU brand in above table */
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if (BrandTableIndex <= MAX_CPU_NUMBER)
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processor_name_string = processor_names[BrandTableIndex];
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if (!processor_name_string)
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processor_name_string = "AMD Processor model unknown";
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memset(program_string, 0, 48);
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strcpy(program_string, processor_name_string);
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/* Now create a model number - See Table 4. Model Number Calculation
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* in the Revision Guide. NOTE: #6, EE was changed to VV because
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* otherwise it clashes with the brand names.
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*/
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for (i=0; i<47; i++) { // 48 -1
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if(program_string[i] == program_string[i+1]) {
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switch (program_string[i]) {
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case 'X': ModelNumber = 22+ NN; break;
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case 'Y': ModelNumber = 38 + (2*NN); break;
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case 'Z':
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case 'T': ModelNumber = 24 + NN; break;
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case 'R': ModelNumber = 45 + (5*NN); break;
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case 'V': ModelNumber = 9 + NN; break;
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}
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if(ModelNumber && ModelNumber < 100) {
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// No idea what to do with RR=100. According
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// to the revision guide this is possible.
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//
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// --> "AMD Opteron(tm) Processor 8100"?
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program_string[i]=(ModelNumber/10)+'0';
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program_string[i+1]=(ModelNumber%10)+'0';
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break;
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}
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}
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}
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printk_debug("CPU model %s\n", program_string);
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for (i=0; i<6; i++) {
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progmsr.lo = program_values[(2*i)+0];
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progmsr.hi = program_values[(2*i)+1];
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wrmsr_amd(0xc0010030+i, progmsr);
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}
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return 0;
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}
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