usbdebug: Force EHCI to D0 state

When resuming from ACPI S3 suspend, EHCI controller
may be in D3 power-management state. Bring it to D0
early so it is functional for console.

NOTE: D3hot->D0 transition was observed to reset
previous programming of PCI_COMMAND register.

Change-Id: Id177ce61926beb057fe67ba42a306d8e565d2657
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20827
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Kyösti Mälkki 2017-07-30 09:01:24 +03:00
parent 6683e409d3
commit 6aea6f7a6b
1 changed files with 9 additions and 0 deletions

View File

@ -44,6 +44,15 @@ int ehci_debug_hw_enable(unsigned int *base, unsigned int *dbg_offset)
if (class != PCI_EHCI_CLASSCODE) if (class != PCI_EHCI_CLASSCODE)
return -1; return -1;
u8 pm_cap = pci_find_capability(dev, PCI_CAP_ID_PM);
if (pm_cap) {
u16 pm_ctrl = pci_read_config16(dev, pm_cap + PCI_PM_CTRL);
/* Set to D0 and disable PM events. */
pm_ctrl &= ~PCI_PM_CTRL_PME_ENABLE;
pm_ctrl &= ~PCI_PM_CTRL_STATE_MASK;
pci_write_config16(dev, pm_cap + PCI_PM_CTRL, pm_ctrl);
}
u8 pos = pci_find_capability(dev, PCI_CAP_ID_EHCI_DEBUG); u8 pos = pci_find_capability(dev, PCI_CAP_ID_EHCI_DEBUG);
if (!pos) if (!pos)
return -1; return -1;