soc/intel/tigerlake: Configure Type-C Input Output Manager(IOM) device
This adds Type-C Intel Input Output Manager(IOM) device with HID INTC1072. It provides MMIO range from 0xfbc10000 with size 0x1600. Intel Input Output Manager(IOM) kernel driver reads relevant information such as Type-C port status (whether a device is connected to a Type-C port or not) and the activity type on the Type-C ports (such as USB, Display Port, Thunderbolt) using this memory resource. BUG=b:156016218 TEST=Able to detect USB, TBT and USB4 on Volteer. Signed-off-by: John Zhao <john.zhao@intel.com> Change-Id: Ic733e831643bda6e052edf797ba0e6206eb4ddd3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41762 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Reviewed-by: Rajmohan Mani <rajmohan.mani@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -318,6 +318,16 @@ Scope (_GPE)
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Scope (\_SB.PCI0)
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Scope (\_SB.PCI0)
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{
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{
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Device (IOM)
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{
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Name (_HID, "INTC1072")
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Name (_DDN, "Intel(R) Tiger Lake Input Output Manager(IOM) driver")
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/* IOM preserved MMIO range from 0xFBC10000 to 0xFBC11600. */
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Name (_CRS, ResourceTemplate () {
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Memory32Fixed (ReadWrite, IOM_BASE_ADDRESS, IOM_BASE_SIZE)
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})
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}
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/*
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/*
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* Operation region defined to access the TCSS_DEVEN. Get the MCHBAR in offset
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* Operation region defined to access the TCSS_DEVEN. Get the MCHBAR in offset
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* 0x48 in B0:D0:F0. TCSS device enable base address is in offset 0x7090 of MCHBAR.
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* 0x48 in B0:D0:F0. TCSS device enable base address is in offset 0x7090 of MCHBAR.
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