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soc/intel/tigerlake: Configure Type-C Input Output Manager(IOM) device 

This adds Type-C Intel Input Output Manager(IOM) device with HID
INTC1072. It provides MMIO range from 0xfbc10000 with size 0x1600.
Intel Input Output Manager(IOM) kernel driver reads relevant
information such as Type-C port status (whether a device is connected
to a Type-C port or not) and the activity type on the Type-C ports
(such as USB, Display Port, Thunderbolt) using this memory resource.

BUG=b:156016218
TEST=Able to detect USB, TBT and USB4 on Volteer.

Signed-off-by: John Zhao <john.zhao@intel.com>
Change-Id: Ic733e831643bda6e052edf797ba0e6206eb4ddd3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41762
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Rajmohan Mani <rajmohan.mani@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
John Zhao 2020-05-26 21:19:19 -07:00 committed by Patrick Georgi
parent 21aece8653
commit 6aedba2f13
1 changed files with 10 additions and 0 deletions
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10
src/soc/intel/tigerlake/acpi/tcss.asl
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@ -318,6 +318,16 @@ Scope (_GPE)
Scope (\_SB.PCI0) Scope (\_SB.PCI0)
{ {
Device (IOM)
{
Name (_HID, "INTC1072")
Name (_DDN, "Intel(R) Tiger Lake Input Output Manager(IOM) driver")
/* IOM preserved MMIO range from 0xFBC10000 to 0xFBC11600. */
Name (_CRS, ResourceTemplate () {
Memory32Fixed (ReadWrite, IOM_BASE_ADDRESS, IOM_BASE_SIZE)
})
}
/* /*
* Operation region defined to access the TCSS_DEVEN. Get the MCHBAR in offset * Operation region defined to access the TCSS_DEVEN. Get the MCHBAR in offset
* 0x48 in B0:D0:F0. TCSS device enable base address is in offset 0x7090 of MCHBAR. * 0x48 in B0:D0:F0. TCSS device enable base address is in offset 0x7090 of MCHBAR.