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mb/google/octopus: Fix termination for unused dual voltage pins 

These pins should not have pull downs configured in standby state as that
can cause contention on the termination circuitry and lead to incorrect
behavior as per Doc# 572688 Gemini Lake Processor GPIOTermination
Configuration.

BUG=b:79982669
TEST=Checked that code compiles with changes.

Change-Id: If3cadc000ec6fc56019ee3f57e556dc819d5e0a5
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://review.coreboot.org/c/30823
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Shamile Khan 2019-01-10 18:46:02 -08:00 committed by Patrick Georgi
parent 6dda1e0556
commit 6afeef829f
2 changed files with 5 additions and 5 deletions
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6
src/mainboard/google/octopus/variants/casta/gpio.c
View File

@ -27,11 +27,11 @@ static const struct pad_config default_override_table[] = {
PAD_NC(GPIO_67, UP_20K), /* EN_PP3300_DX_LTE_SOC -- unused */
PAD_NC(GPIO_105, DN_20K), /* TOUCHSCREEN_RST -- unused */
PAD_NC(GPIO_105, UP_20K), /* TOUCHSCREEN_RST -- unused */
PAD_NC(GPIO_108, NONE), /* PMU_SUSCLK -- unused */
PAD_NC(GPIO_114, DN_20K), /* I2C7 Touchscreen -- unused */
PAD_NC(GPIO_115, DN_20K), /* I2C7 Touchscreen -- unused */
PAD_NC(GPIO_114, UP_20K), /* I2C7 Touchscreen -- unused */
PAD_NC(GPIO_115, UP_20K), /* I2C7 Touchscreen -- unused */
PAD_NC(GPIO_117, UP_20K), /* PCIE_WAKE1_B - No LTE*/
PAD_NC(GPIO_119, UP_20K), /* PCIE_WAKE3_B - only use CNVI */

4
src/mainboard/google/octopus/variants/fleex/gpio.c
View File

@ -28,8 +28,8 @@ static const struct pad_config default_override_table[] = {
PAD_NC(GPIO_67, UP_20K),
PAD_NC(GPIO_117, UP_20K),
PAD_NC(GPIO_138, DN_20K),
PAD_NC(GPIO_139, DN_20K),
PAD_NC(GPIO_138, UP_20K),
PAD_NC(GPIO_139, UP_20K),
PAD_NC(GPIO_140, UP_20K),
PAD_NC(GPIO_143, UP_20K),
PAD_NC(GPIO_144, UP_20K),