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mb/google/sarien: Use meaningful SATA mode 

Define SATA mode to AHCI mode instead of 0, make devicetree more
readable.

BUG=N/A

Change-Id: I903545d9487c1409f9008407fe5bee6aa4959b98
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/30095
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Lijian Zhao 2018-12-06 17:07:25 -08:00 committed by Patrick Georgi
parent ba8202948a
commit 6b2c9b1751
2 changed files with 2 additions and 2 deletions
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2
src/mainboard/google/sarien/variants/arcada/devicetree.cb
View File

@ -17,7 +17,7 @@ chip soc/intel/cannonlake
register "SaGv" = "3"
register "HeciEnabled" = "1"
register "SataSalpSupport" = "1"
register "SataMode" = "0"
register "SataMode" = "Sata_AHCI"
register "SataPortsEnable[2]" = "1"
register "SataPortsDevSlp[2]" = "1"
register "InternalGfx" = "1"

2
src/mainboard/google/sarien/variants/sarien/devicetree.cb
View File

@ -17,7 +17,7 @@ chip soc/intel/cannonlake
register "SaGv" = "3"
register "HeciEnabled" = "1"
register "SataSalpSupport" = "1"
register "SataMode" = "0"
register "SataMode" = "Sata_AHCI"
register "SataPortsEnable[0]" = "1"
register "SataPortsEnable[1]" = "1"
register "SataPortsEnable[2]" = "1"