soc/amd/picasso: clean up Kconfig and header
Clean up Kconfig and psp_trasfer.h files before copying over to cezanne. TEST=build, flash and boot on jelboz360 Signed-off-by: Kangheui Won <khwon@chromium.org> Change-Id: Ib370d93e23c15a2fe4c46051ed3647d2d067bb10 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52563 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -109,9 +109,9 @@ config PSP_SHAREDMEM_BASE
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default 0x0
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help
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This variable defines the base address in DRAM memory where PSP copies
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vboot workbuf to. This is used in linker script to have a static
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the vboot workbuf. This is used in the linker script to have a static
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allocation for the buffer as well as for adding relevant entries in
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BIOS directory table for the PSP.
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the BIOS directory table for the PSP.
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config PSP_SHAREDMEM_SIZE
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hex
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@ -405,16 +405,6 @@ config PSP_WHITELIST_FILE
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depends on HAVE_PSP_WHITELIST_FILE
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default "3rdparty/amd_blobs/picasso/PSP/wtl-rvn.sbin"
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config PSP_SHAREDMEM_SIZE
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hex "Maximum size of shared memory area"
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default 0x3000 if VBOOT
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default 0x0
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help
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Sets the maximum size for the PSP to pass the vboot workbuf and
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any logs or timestamps back to coreboot. This will be copied
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into main memory by the PSP and will be available when the x86 is
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started.
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config PSP_UNLOCK_SECURE_DEBUG
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bool "Unlock secure debug"
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default n
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@ -9,7 +9,7 @@
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# error "Must set CONFIG_CMOS_RECOVERY_BYTE"
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# endif
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#define CMOS_RECOVERY_MAGIC_VAL 0x96
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#define CMOS_RECOVERY_MAGIC_VAL 0x96
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#define TRANSFER_INFO_SIZE 64
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#define TIMESTAMP_BUFFER_SIZE 0x200
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@ -44,7 +44,7 @@ struct transfer_info_struct {
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uint32_t psp_info; /* Offset 0x3C */
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};
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_Static_assert(sizeof(struct transfer_info_struct) == TRANSFER_INFO_SIZE, \
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_Static_assert(sizeof(struct transfer_info_struct) == TRANSFER_INFO_SIZE,
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"TRANSFER_INFO_SIZE is incorrect");
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/* Make sure the PSP transferred information over to x86 side. */
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