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AMD and GFXUMA: move setup_uma_memory() to northbridge 

UMA region can be determined at any time after the amount
of RAM is known and before the uma_resource() call.

Change-Id: I2a0bf2d3cad55ee70e889c88846f962b7faa0c7e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/1379
Reviewed-by: Zheng Bao <zheng.bao@amd.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
This commit is contained in:
Kyösti Mälkki 2012-07-19 19:26:43 +03:00 committed by Anton Kochkov
parent 30f04645c1
commit 6b5eb1cc2d
36 changed files with 18 additions and 62 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/include/device/device.h
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@ -112,7 +112,6 @@ extern struct resource *free_resources;
extern struct bus *free_links;
/* IGD UMA memory */
void setup_uma_memory(void);
extern uint64_t uma_memory_base;
extern uint64_t uma_memory_size;

2
src/mainboard/advansus/a785e-i/mainboard.c
View File

@ -78,8 +78,6 @@ static void a785e_i_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard A785E-I Enable. dev=0x%p\n", dev);
setup_uma_memory();
set_pcie_dereset();
enable_int_gfx();
}

2
src/mainboard/amd/bimini_fam10/mainboard.c
View File

@ -128,8 +128,6 @@ static void bimini_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard BIMINI Enable. dev=0x%p\n", dev);
setup_uma_memory();
set_pcie_dereset();
enable_int_gfx();
/* get_ide_dma66(); */

2
src/mainboard/amd/dbm690t/mainboard.c
View File

@ -185,8 +185,6 @@ static void dbm690t_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard DBM690T Enable. dev=0x%p\n", dev);
setup_uma_memory();
enable_onboard_nic();
get_ide_dma66();
set_thermal_config();

1
src/mainboard/amd/dinar/mainboard.c
View File

@ -72,7 +72,6 @@ void set_pcie_dereset(void *nbconfig)
static void dinar_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard Dinar Enable. dev=0x%p\n", dev);
setup_uma_memory();
}
int add_mainboard_resources(struct lb_memory *mem)

2
src/mainboard/amd/inagua/mainboard.c
View File

@ -78,8 +78,6 @@ static void inagua_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
setup_uma_memory();
/* Inagua mainboard specific setting */
set_pcie_dereset();
}

1
src/mainboard/amd/mahogany/mainboard.c
View File

@ -101,7 +101,6 @@ u8 is_dev3_present(void)
static void mahogany_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard MAHOGANY Enable. dev=0x%p\n", dev);
setup_uma_memory();
set_pcie_dereset();
/* get_ide_dma66(); */

2
src/mainboard/amd/mahogany_fam10/mainboard.c
View File

@ -103,8 +103,6 @@ static void mahogany_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard MAHOGANY Enable. dev=0x%p\n", dev);
setup_uma_memory();
set_pcie_dereset();
/* get_ide_dma66(); */
}

2
src/mainboard/amd/parmer/mainboard.c
View File

@ -44,9 +44,7 @@ static void parmer_enable(device_t dev)
acpi_slp_type = acpi_get_sleep_type();
if (acpi_slp_type == 3)
agesawrapper_fchs3earlyrestore();
#endif
setup_uma_memory();
}
int add_mainboard_resources(struct lb_memory *mem)

3
src/mainboard/amd/persimmon/mainboard.c
View File

@ -64,9 +64,6 @@ static void persimmon_enable(device_t dev)
#if CONFIG_HAVE_ACPI_RESUME
acpi_slp_type = acpi_get_sleep_type();
#endif
setup_uma_memory();
}
int add_mainboard_resources(struct lb_memory *mem)

3
src/mainboard/amd/pistachio/mainboard.c
View File

@ -255,10 +255,7 @@ static void pistachio_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard Pistachio Enable. dev=0x%p\n", dev);
setup_uma_memory();
enable_onboard_nic();
set_thermal_config();
}

2
src/mainboard/amd/south_station/mainboard.c
View File

@ -79,8 +79,6 @@ static void southstation_led_init(void)
static void southstation_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
setup_uma_memory();
southstation_led_init();
}

2
src/mainboard/amd/tilapia_fam10/mainboard.c
View File

@ -278,8 +278,6 @@ static void tilapia_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard TILAPIA Enable. dev=0x%p\n", dev);
setup_uma_memory();
set_pcie_dereset();
/* get_ide_dma66(); */
set_thermal_config();

1
src/mainboard/amd/torpedo/mainboard.c
View File

@ -56,7 +56,6 @@ void set_pcie_dereset(void)
static void torpedo_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable. dev=0x%p\n", dev);
setup_uma_memory();
}
int add_mainboard_resources(struct lb_memory *mem)

2
src/mainboard/amd/union_station/mainboard.c
View File

@ -53,8 +53,6 @@ void set_pcie_dereset(void)
static void unionstation_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
setup_uma_memory();
}
int add_mainboard_resources(struct lb_memory *mem)

2
src/mainboard/asrock/939a785gmh/mainboard.c
View File

@ -100,8 +100,6 @@ static void mb_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard 939A785GMH/128M Enable. dev=0x%p\n", dev);
setup_uma_memory();
set_pcie_dereset();
/* get_ide_dma66(); */
}

1
src/mainboard/asrock/e350m1/mainboard.c
View File

@ -52,7 +52,6 @@ void set_pcie_dereset(void)
static void e350m1_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
setup_uma_memory();
}
int add_mainboard_resources(struct lb_memory *mem)

2
src/mainboard/asus/m4a78-em/mainboard.c
View File

@ -122,8 +122,6 @@ static void m4a78em_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard enable. dev=0x%p\n", dev);
setup_uma_memory();
set_pcie_dereset();
/* get_ide_dma66(); */
/* set_thermal_config(); */

2
src/mainboard/asus/m4a785-m/mainboard.c
View File

@ -194,8 +194,6 @@ static void m4a785m_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard enable. dev=0x%p\n", dev);
setup_uma_memory();
set_pcie_dereset();
/* get_ide_dma66(); */
set_thermal_config();

2
src/mainboard/asus/m5a88-v/mainboard.c
View File

@ -79,8 +79,6 @@ static void m5a88pm_v_enable(device_t dev)
printk(BIOS_INFO, "Mainboard ASUS M5A88-V Enable. dev=0x%p\n", dev);
setup_uma_memory();
set_pcie_dereset();
enable_int_gfx();
}

2
src/mainboard/avalue/eax-785e/mainboard.c
View File

@ -78,8 +78,6 @@ static void eax_785e(device_t dev)
{
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
setup_uma_memory();
set_pcie_dereset();
enable_int_gfx();
}

2
src/mainboard/gigabyte/ma785gm/mainboard.c
View File

@ -139,8 +139,6 @@ static void ma785gm_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard MA785GM-US2H Enable. dev=0x%p\n", dev);
setup_uma_memory();
set_pcie_dereset();
/* get_ide_dma66(); */
set_gpio40_gfx();

2
src/mainboard/gigabyte/ma785gmt/mainboard.c
View File

@ -249,8 +249,6 @@ static void ma785gmt_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard MA785GMT-UD2H Enable. dev=0x%p\n", dev);
setup_uma_memory();
set_pcie_dereset();
/* get_ide_dma66(); */
set_thermal_config();

2
src/mainboard/gigabyte/ma78gm/mainboard.c
View File

@ -76,8 +76,6 @@ static void ma78gm_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard MA78GM-US2H Enable. dev=0x%p\n", dev);
setup_uma_memory();
set_pcie_dereset();
/* get_ide_dma66(); */
}

2
src/mainboard/iei/kino-780am2-fam10/mainboard.c
View File

@ -58,8 +58,6 @@ static void kino_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard Kino Enable. dev=0x%p\n", dev);
setup_uma_memory();
set_pcie_dereset();
/* get_ide_dma66(); */
}

2
src/mainboard/jetway/pa78vm5/mainboard.c
View File

@ -105,8 +105,6 @@ static void pa78vm5_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard PA78VM5 Enable. dev=0x%p\n", dev);
setup_uma_memory();
set_pcie_dereset();
/* get_ide_dma66(); */
}

2
src/mainboard/kontron/kt690/mainboard.c
View File

@ -185,8 +185,6 @@ static void kt690_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard KT690 Enable. dev=0x%p\n", dev);
setup_uma_memory();
enable_onboard_nic();
get_ide_dma66();
set_thermal_config();

1
src/mainboard/siemens/sitemp_g1p1/mainboard.c
View File

@ -851,7 +851,6 @@ static void enable_dev(device_t dev)
detect_hw_variant(dev);
update_subsystemid(dev);
setup_uma_memory();
dev->ops->init = init; // rest of mainboard init later
}

2
src/mainboard/technexion/tim5690/mainboard.c
View File

@ -239,8 +239,6 @@ static void tim5690_enable(device_t dev)
vbios_regs.int15_regs.fun05_tv_standard = TV_MODE_NO;
vgabios_init(&vbios_regs);
setup_uma_memory();
set_thermal_config();
}

2
src/mainboard/technexion/tim8690/mainboard.c
View File

@ -145,8 +145,6 @@ static void tim8690_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard tim8690 Enable. dev=0x%p\n", dev);
setup_uma_memory();
enable_onboard_nic();
set_thermal_config();
}

4
src/northbridge/amd/agesa/family12/northbridge.c
View File

@ -469,7 +469,7 @@ static void set_resources(device_t dev)
printk(BIOS_DEBUG, "Fam12h - northbridge.c - set_resources - End.\n");
}
void setup_uma_memory(void)
static void setup_uma_memory(void)
{
#if CONFIG_GFXUMA
msr_t msr, msr2;
@ -611,6 +611,8 @@ static void domain_set_resources(device_t dev)
u32 reset_memhole = 1;
#endif
setup_uma_memory();
#if CONFIG_PCI_64BIT_PREF_MEM
printk(BIOS_DEBUG, "adsr - CONFIG_PCI_64BIT_PREF_MEM is true.\n");

4
src/northbridge/amd/agesa/family14/northbridge.c
View File

@ -517,7 +517,7 @@ static void domain_read_resources(device_t dev)
#endif
}
void setup_uma_memory(void)
static void setup_uma_memory(void)
{
#if CONFIG_GFXUMA
msr_t msr, msr2;
@ -574,6 +574,8 @@ static void domain_set_resources(device_t dev)
u32 reset_memhole = 1;
#endif
setup_uma_memory();
#if CONFIG_PCI_64BIT_PREF_MEM
printk(BIOS_DEBUG, "adsr - CONFIG_PCI_64BIT_PREF_MEM is true.\n");

4
src/northbridge/amd/agesa/family15/northbridge.c
View File

@ -629,7 +629,7 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
#define ONE_MB 0x100000
void setup_uma_memory(void)
static void setup_uma_memory(void)
{
#if CONFIG_GFXUMA
msr_t msr, msr2;
@ -686,6 +686,8 @@ static void domain_set_resources(device_t dev)
u32 reset_memhole = 1;
#endif
setup_uma_memory();
#if CONFIG_PCI_64BIT_PREF_MEM
for (link = dev->link_list; link; link = link->next) {

4
src/northbridge/amd/agesa/family15tn/northbridge.c
View File

@ -638,7 +638,7 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
#define ONE_MB_SHIFT 20
void setup_uma_memory(void)
static void setup_uma_memory(void)
{
#if CONFIG_GFXUMA
msr_t msr, msr2;
@ -696,6 +696,8 @@ static void domain_set_resources(device_t dev)
u32 reset_memhole = 1;
#endif
setup_uma_memory();
#if CONFIG_PCI_64BIT_PREF_MEM
for (link = dev->link_list; link; link = link->next) {

4
src/northbridge/amd/amdfam10/northbridge.c
View File

@ -848,7 +848,7 @@ static void disable_hoist_memory(unsigned long hole_startk, int node_id)
#include <cbmem.h>
#endif
void setup_uma_memory(void)
static void setup_uma_memory(void)
{
#if CONFIG_GFXUMA
msr_t msr, msr2;
@ -903,6 +903,8 @@ static void amdfam10_domain_set_resources(device_t dev)
u32 reset_memhole = 1;
#endif
setup_uma_memory();
#if CONFIG_PCI_64BIT_PREF_MEM
for(link = dev->link_list; link; link = link->next) {

4
src/northbridge/amd/amdk8/northbridge.c
View File

@ -823,7 +823,7 @@ static u32 hoist_memory(unsigned long hole_startk, int node_id)
#include <cbmem.h>
#endif
void setup_uma_memory(void)
static void setup_uma_memory(void)
{
#if CONFIG_GFXUMA
msr_t msr, msr2;
@ -896,6 +896,8 @@ static void amdk8_domain_set_resources(device_t dev)
u32 reset_memhole = 1;
#endif
setup_uma_memory();
#if 0
/* Place the IO devices somewhere safe */
io = find_resource(dev, 0);