mb/google/nissa/var/yavilla: Disable SUSCLK based on fw_config
Disable SUSCLK for MT7922 based on FW_CONFIG to avoid power leakage. SAR_ID_0 : Yaviks_Gfp2 SAR_ID_1 : Yaviks & Yavilla_MT7921 SAR_ID_2 : Yahiko_Gfp2 SAR_ID_3 : Yavilla_MT7922 BUG=b:298138654 BRANCH=firmware-nissa-15217.B TEST=emerge-nissa coreboot Change-Id: I2f191683d0623aa5dce815998a24fddce2a36b2c Signed-off-by: Shon Wang <shon.wang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77559 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -66,6 +66,11 @@ static const struct pad_config stylus_disable_pads[] = {
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PAD_NC_LOCK(GPP_F15, NONE, LOCK_CONFIG),
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PAD_NC_LOCK(GPP_F15, NONE, LOCK_CONFIG),
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};
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};
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static const struct pad_config disable_wifi_pch_susclk[] = {
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/* GPD8 ==> NC */
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PAD_NC(GPD8, NONE),
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};
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void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
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void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
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{
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{
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if (!fw_config_probe(FW_CONFIG(DB_USB, DB_1C_LTE))) {
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if (!fw_config_probe(FW_CONFIG(DB_USB, DB_1C_LTE))) {
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@ -88,5 +93,9 @@ void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
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gpio_padbased_override(padbased_table, stylus_disable_pads,
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gpio_padbased_override(padbased_table, stylus_disable_pads,
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ARRAY_SIZE(stylus_disable_pads));
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ARRAY_SIZE(stylus_disable_pads));
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}
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}
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if (fw_config_probe(FW_CONFIG(WIFI_SAR_ID, SAR_ID_3))) {
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printk(BIOS_INFO, "Disable PCH SUSCLK.\n");
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gpio_padbased_override(padbased_table, disable_wifi_pch_susclk,
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ARRAY_SIZE(disable_wifi_pch_susclk));
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}
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}
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}
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@ -7,6 +7,9 @@ fw_config
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end
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end
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field WIFI_SAR_ID 2 3
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field WIFI_SAR_ID 2 3
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option SAR_ID_0 0
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option SAR_ID_0 0
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option SAR_ID_1 1
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option SAR_ID_2 2
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option SAR_ID_3 3
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end
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end
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field STYLUS 9
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field STYLUS 9
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option STYLUS_ABSENT 0
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option STYLUS_ABSENT 0
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