hifive-unleashed: update documentation to match current state
Signed-off-by: Philipp Hug <philipp@hug.cx> Change-Id: I3f1b7dd4ef52a64c9a222f2d5cffe2b73806fe4e Reviewed-on: https://review.coreboot.org/c/coreboot/+/32182 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
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@ -12,15 +12,13 @@ For general setup instructions, please refer to the [Getting Started Guide].
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The following things are still missing from this coreboot port:
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- Support running romstage from flash (fix stack) to support boot mode 1
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- CBMEM support
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- FU540 clock configuration
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- FU540 RAM init
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- Placing the ramstage in DRAM
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- Starting the U54 cores
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- FU540 PIN configuration and GPIO access macros
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- Provide serial number to payload (e.g. in device tree)
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- Implement instruction emulation
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- Support for booting Linux on RISC-V
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- Add support to run OpenSBI payload in m-mode
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- SMP support in trap handler
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## Configuration
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