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hifive-unleashed: update documentation to match current state 

Signed-off-by: Philipp Hug <philipp@hug.cx>
Change-Id: I3f1b7dd4ef52a64c9a222f2d5cffe2b73806fe4e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32182
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
This commit is contained in:
Philipp Hug 2019-04-04 15:57:24 +02:00 committed by Philipp Deppenwiese
parent 7f1a0e6b4c
commit 6b6dc6eddd
1 changed files with 3 additions and 5 deletions
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Documentation/mainboard/sifive/hifive-unleashed.md
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@ -12,15 +12,13 @@ For general setup instructions, please refer to the [Getting Started Guide].
The following things are still missing from this coreboot port: The following things are still missing from this coreboot port:
- Support running romstage from flash (fix stack) to support boot mode 1 - Support running romstage from flash (fix stack) to support boot mode 1
- CBMEM support
- FU540 clock configuration
- FU540 RAM init
- Placing the ramstage in DRAM
- Starting the U54 cores - Starting the U54 cores
- FU540 PIN configuration and GPIO access macros - FU540 PIN configuration and GPIO access macros
- Provide serial number to payload (e.g. in device tree) - Provide serial number to payload (e.g. in device tree)
- Implement instruction emulation
- Support for booting Linux on RISC-V - Support for booting Linux on RISC-V
- Add support to run OpenSBI payload in m-mode
- SMP support in trap handler
## Configuration ## Configuration