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mb/google/dedede: add gooey variant 

gooey is the same design as boten, and differs only in replacing Cr50
with discrete TPM.

BUG=b:193366710, 197247706
TEST=FW_NAME=gooey emerge-keeby coreboot

Signed-off-by: stanley.wu <stanley1.wu@lcfc.corp-partner.google.com>
Change-Id: I2a54f872a7d5c0bee76a9e6e309613d9357b380b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56858
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
stanley.wu 2021-08-07 01:23:44 +08:00 committed by Felix Held
parent 954df3d6bf
commit 6b74434414
11 changed files with 455 additions and 0 deletions
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2
src/mainboard/google/dedede/Kconfig
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@ -115,6 +115,7 @@ config MAINBOARD_PART_NUMBER
default "Bugzzy" if BOARD_GOOGLE_BUGZZY default "Bugzzy" if BOARD_GOOGLE_BUGZZY
default "Corori" if BOARD_GOOGLE_CORORI default "Corori" if BOARD_GOOGLE_CORORI
default "Driblee" if BOARD_GOOGLE_DRIBLEE default "Driblee" if BOARD_GOOGLE_DRIBLEE
default "Gooey" if BOARD_GOOGLE_GOOEY
config MAX_CPUS config MAX_CPUS
int int
@ -155,6 +156,7 @@ config VARIANT_DIR
default "bugzzy" if BOARD_GOOGLE_BUGZZY default "bugzzy" if BOARD_GOOGLE_BUGZZY
default "corori" if BOARD_GOOGLE_CORORI default "corori" if BOARD_GOOGLE_CORORI
default "driblee" if BOARD_GOOGLE_DRIBLEE default "driblee" if BOARD_GOOGLE_DRIBLEE
default "gooey" if BOARD_GOOGLE_GOOEY
endif #BOARD_GOOGLE_BASEBOARD_DEDEDE endif #BOARD_GOOGLE_BASEBOARD_DEDEDE

6
src/mainboard/google/dedede/Kconfig.name
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@ -176,3 +176,9 @@ config BOARD_GOOGLE_DRIBLEE
bool "-> Driblee" bool "-> Driblee"
select BOARD_GOOGLE_BASEBOARD_DEDEDE_TPM2 select BOARD_GOOGLE_BASEBOARD_DEDEDE_TPM2
select BASEBOARD_DEDEDE_LAPTOP select BASEBOARD_DEDEDE_LAPTOP
config BOARD_GOOGLE_GOOEY
bool "Gooey"
select BOARD_GOOGLE_BASEBOARD_DEDEDE_TPM2
select BASEBOARD_DEDEDE_LAPTOP
select GEO_SAR_ENABLE if CHROMEOS_WIFI_SAR

7
src/mainboard/google/dedede/variants/gooey/Makefile.inc Normal file
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@ -0,0 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only
ramstage-y += gpio.c
smm-y += variant.c
ramstage-y += variant.c

65
src/mainboard/google/dedede/variants/gooey/gpio.c Normal file
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@ -0,0 +1,65 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
#include <vendorcode/google/chromeos/chromeos.h>
/* Pad configuration in ramstage*/
static const struct pad_config gpio_table[] = {
/* A10 : WWAN_EN => LTE_PWR_OFF_ODL */
PAD_CFG_GPO(GPP_A10, 1, PWROK),
/* B7 : WWAN_SAR_DETECT_R_ODL */
PAD_CFG_GPO(GPP_B7, 1, DEEP),
/* C12 : AP_PEN_DET_ODL */
PAD_CFG_GPI_GPIO_DRIVER(GPP_C12, UP_20K, DEEP),
/* C18 : AP_I2C_EMR_SDA */
PAD_NC(GPP_C18, NONE),
/* C19 : AP_I2C_EMR_SCL */
PAD_NC(GPP_C19, NONE),
/* C22 : UART2_RTS_N */
PAD_NC(GPP_C22, NONE),
/* C23 : UART2_CTS_N */
PAD_NC(GPP_C23, NONE),
/* D12 : WCAM_RST_L */
PAD_NC(GPP_D12, NONE),
/* D13 : EN_PP2800_CAMERA */
PAD_CFG_GPO(GPP_D13, 1, PLTRST),
/* D14 : EN_PP1200_CAMERA */
PAD_NC(GPP_D14, NONE),
/* D15 : UCAM_RST_L */
PAD_NC(GPP_D15, NONE),
/* D19 : WWAN_WLAN_COEX1 */
PAD_NC(GPP_D19, NONE),
/* D20 : WWAN_WLAN_COEX2 */
PAD_NC(GPP_D20, NONE),
/* D21 : WWAN_WLAN_COEX3 */
PAD_NC(GPP_D21, NONE),
/* D22 : AP_I2C_SUB_SDA*/
PAD_CFG_NF(GPP_D22, NONE, DEEP, NF1),
/* D23 : AP_I2C_SUB_SCL */
PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1),
/* E0 : CLK_24M_UCAM */
PAD_NC(GPP_E0, NONE),
/* E2 : CLK_24M_WCAM */
PAD_NC(GPP_E2, NONE),
/* E11 : AP_I2C_SUB_INT_ODL */
PAD_CFG_GPI_APIC(GPP_E11, NONE, PLTRST, LEVEL, NONE),
/* H6 : AP_I2C_CAM_SDA */
PAD_NC(GPP_H6, NONE),
/* H7 : AP_I2C_CAM_SCL */
PAD_NC(GPP_H7, NONE),
/* H17 : WWAN_RST_L => LTE_RESET_R_ODL */
PAD_CFG_GPO(GPP_H17, 0, PLTRST),
};
const struct pad_config *variant_override_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(gpio_table);
return gpio_table;
}

8
src/mainboard/google/dedede/variants/gooey/include/variant/ec.h Normal file
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@ -0,0 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef MAINBOARD_EC_H
#define MAINBOARD_EC_H
#include <baseboard/ec.h>
#endif

8
src/mainboard/google/dedede/variants/gooey/include/variant/gpio.h Normal file
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@ -0,0 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef MAINBOARD_GPIO_H
#define MAINBOARD_GPIO_H
#include <baseboard/gpio.h>
#endif /* MAINBOARD_GPIO_H */

5
src/mainboard/google/dedede/variants/gooey/memory/Makefile.inc Normal file
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@ -0,0 +1,5 @@
## SPDX-License-Identifier: GPL-2.0-or-later
## This is an auto-generated file. Do not edit!!
SPD_SOURCES =
SPD_SOURCES += lp4x-spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, K4U6E3S4AA-MGCR, H9HCNNNBKMMLXR-NEE

4
src/mainboard/google/dedede/variants/gooey/memory/dram_id.generated.txt Normal file
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@ -0,0 +1,4 @@
DRAM Part Name ID to assign
MT53E512M32D2NP-046 WT:E 0 (0000)
K4U6E3S4AA-MGCR 0 (0000)
H9HCNNNBKMMLXR-NEE 0 (0000)

3
src/mainboard/google/dedede/variants/gooey/memory/mem_list_variant.txt Normal file
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@ -0,0 +1,3 @@
MT53E512M32D2NP-046 WT:E
K4U6E3S4AA-MGCR
H9HCNNNBKMMLXR-NEE

324
src/mainboard/google/dedede/variants/gooey/overridetree.cb Normal file
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@ -0,0 +1,324 @@
chip soc/intel/jasperlake
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |
#+-------------------+---------------------------+
#| I2C0 | Trackpad |
#| I2C1 | Digitizer |
#| I2C2 | Touchscreen, Stylus |
#| I2C4 | Audio |
#| I2C5 | P-Sensor |
#+-------------------+---------------------------+
register "common_soc_config" = "{
.i2c[0] = {
.speed = I2C_SPEED_FAST,
},
.i2c[1] = {
.speed = I2C_SPEED_FAST,
},
.i2c[2] = {
.speed = I2C_SPEED_FAST,
},
.i2c[4] = {
.speed = I2C_SPEED_FAST,
},
.i2c[5] = {
.speed = I2C_SPEED_FAST,
},
}"
# USB Port Configuration
register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Not Used
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # UF Camera
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # WF Camera
register "SerialIoI2cMode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoPci,
[PchSerialIoIndexI2C1] = PchSerialIoPci,
[PchSerialIoIndexI2C2] = PchSerialIoPci,
[PchSerialIoIndexI2C3] = PchSerialIoDisabled,
[PchSerialIoIndexI2C4] = PchSerialIoPci,
[PchSerialIoIndexI2C5] = PchSerialIoPci,
}"
register "SerialIoGSpiMode[PchSerialIoIndexGSPI0]" = "PchSerialIoDisabled" # Disable GSPI0
register "SerialIoGSpiCsMode[PchSerialIoIndexGSPI0]" = "0"
# Enable Acoustic noise mitigation and set slew rate to 1/8
# Rest of the parameters are 0 by default.
register "AcousticNoiseMitigation" = "1"
register "SlowSlewRate" = "SlewRateFastBy8"
register "FastPkgCRampDisable" = "1"
# Set xHCI LFPS period sampling off time to 0 ms
register "xhci_lfps_sampling_offtime_ms" = "0"
device domain 0 on
device pci 04.0 on
chip drivers/intel/dptf
## Passive Policy
register "policies.passive" = "{
[0] = DPTF_PASSIVE(CPU, CPU, 90, 10000),
[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000),
[2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 75, 15000)
}"
## Critical Policy
register "policies.critical" = "{
[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN),
[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN)
}"
## Power Limits Control
register "controls.power_limits" = "{
.pl1 = {
.min_power = 3000,
.max_power = 6000,
.time_window_min = 1 * MSECS_PER_SEC,
.time_window_max = 1 * MSECS_PER_SEC,
.granularity = 200,
},
.pl2 = {
.min_power = 20000,
.max_power = 20000,
.time_window_min = 1 * MSECS_PER_SEC,
.time_window_max = 1 * MSECS_PER_SEC,
.granularity = 1000,
}
}"
register "options.tsr[0].desc" = ""Memory""
register "options.tsr[1].desc" = ""Charger""
## Charger Performance Control (Control, mA)
register "controls.charger_perf" = "{
[0] = { 255, 3000 },
[1] = { 24, 2000 },
[2] = { 16, 1500 },
[3] = { 8, 1000 }
}"
device generic 0 on end
end
end # SA Thermal device
device pci 14.0 on
chip drivers/usb/acpi
register "desc" = ""Root Hub""
register "type" = "UPC_TYPE_HUB"
device usb 0.0 on
chip drivers/usb/acpi
register "desc" = ""Right Type-A Port""
register "type" = "UPC_TYPE_A"
register "group" = "ACPI_PLD_GROUP(2, 1)"
device usb 2.1 on end
end
chip drivers/usb/acpi
register "desc" = ""LTE""
register "type" = "UPC_TYPE_INTERNAL"
register "has_power_resource" = "1"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H17)"
register "reset_off_delay_ms" = "10"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A10)"
register "enable_delay_ms" = "20"
device usb 2.3 on end
end
chip drivers/usb/acpi
register "desc" = ""UFCamera""
register "type" = "UPC_TYPE_INTERNAL"
device usb 2.5 on end
end
chip drivers/usb/acpi
register "desc" = ""WFCamera""
register "type" = "UPC_TYPE_INTERNAL"
device usb 2.6 on end
end
chip drivers/usb/acpi
register "desc" = ""Right Type-A Port""
register "type" = "UPC_TYPE_USB3_A"
register "group" = "ACPI_PLD_GROUP(2, 1)"
device usb 3.1 on end
end
chip drivers/usb/acpi
register "desc" = ""LTE""
register "type" = "UPC_TYPE_INTERNAL"
device usb 3.3 on end
end
end
end
end # USB xHCI
device pci 15.0 on
chip drivers/i2c/generic
register "hid" = ""ELAN0000""
register "desc" = ""ELAN Touchpad""
register "irq" = "ACPI_IRQ_WAKE_EDGE_LOW(GPP_B3_IRQ)"
register "wake" = "GPE0_DW0_03"
register "probed" = "1"
device i2c 15 on end
end
chip drivers/i2c/hid
register "generic.hid" = ""PNP0C50""
register "generic.desc" = ""Synaptics Touchpad""
register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_B3_IRQ)"
register "generic.wake" = "GPE0_DW0_03"
register "generic.probed" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 0x2c on end
end
end # I2C 0
device pci 15.2 on
chip drivers/generic/gpio_keys
register "name" = ""PENH""
register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_C12)"
register "key.wakeup_route" = "WAKEUP_ROUTE_GPIO_IRQ"
register "key.wakeup_event_action" = "EV_ACT_DEASSERTED"
register "key.dev_name" = ""EJCT""
register "key.linux_code" = "SW_PEN_INSERTED"
register "key.linux_input_type" = "EV_SW"
register "key.label" = ""pen_eject""
device generic 0 on end
end
chip drivers/i2c/hid
register "generic.hid" = ""GDIX0000""
register "generic.desc" = ""Goodix Touchscreen""
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D4_IRQ)"
register "generic.probed" = "1"
register "generic.reset_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D5)"
register "generic.reset_delay_ms" = "180"
register "generic.reset_off_delay_ms" = "3"
register "generic.stop_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A11)"
register "generic.stop_delay_ms" = "20"
register "generic.stop_off_delay_ms" = "2"
register "generic.enable_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)"
register "generic.enable_delay_ms" = "12"
register "generic.has_power_resource" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 0x5d on end
end
chip drivers/i2c/hid
register "generic.hid" = ""ELAN901C""
register "generic.desc" = ""ELAN Touchscreen""
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D4_IRQ)"
register "generic.probed" = "1"
register "generic.reset_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D5)"
register "generic.reset_delay_ms" = "20"
register "generic.reset_off_delay_ms" = "2"
register "generic.stop_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A11)"
register "generic.stop_delay_ms" = "280"
register "generic.stop_off_delay_ms" = "2"
register "generic.enable_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end
end # I2C 2
device pci 15.3 off end # I2C 3
device pci 19.0 on
chip drivers/i2c/generic
register "hid" = ""10EC5682""
register "name" = ""RT58""
register "desc" = ""Realtek RT5682""
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D16)"
register "property_count" = "1"
register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
register "property_list[0].name" = ""realtek,jd-src""
register "property_list[0].integer" = "1"
device i2c 1a on end
end
chip drivers/i2c/generic
register "hid" = ""10EC1015""
register "desc" = ""Realtek SPK AMP L""
register "uid" = "0"
device i2c 28 on
probe AUDIO_AMP RT1015_I2C
probe AUDIO_AMP UNPROVISIONED
end
end
chip drivers/i2c/generic
register "hid" = ""10EC1015""
register "desc" = ""Realtek SPK AMP R""
register "uid" = "1"
device i2c 29 on
probe AUDIO_AMP RT1015_I2C
probe AUDIO_AMP UNPROVISIONED
end
end
end # I2C 4
device pci 19.1 on
chip drivers/i2c/sx9324
register "desc" = ""SAR Proximity Sensor""
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E11_IRQ)"
register "uid" = "2"
register "reg_gnrl_ctrl0" = "0x0a"
register "reg_gnrl_ctrl1" = "0x22"
register "reg_afe_ctrl0" = "0x20"
register "reg_afe_ctrl3" = "0x01"
register "reg_afe_ctrl4" = "0x47"
register "reg_afe_ctrl6" = "0x00"
register "reg_afe_ctrl7" = "0x47"
register "reg_afe_ctrl8" = "0x12"
register "reg_afe_ctrl9" = "0x0f"
register "reg_afe_ph0" = "0x37"
register "reg_afe_ph1" = "0x29"
register "reg_afe_ph2" = "0x1f"
register "reg_afe_ph3" = "0x3d"
register "reg_prox_ctrl0" = "0x0b"
register "reg_prox_ctrl1" = "0x0b"
register "reg_prox_ctrl2" = "0x20"
register "reg_prox_ctrl3" = "0x20"
register "reg_prox_ctrl4" = "0x0c"
register "reg_prox_ctrl5" = "0x00"
register "reg_prox_ctrl6" = "0x2d"
register "reg_prox_ctrl7" = "0xc0"
register "reg_adv_ctrl0" = "0x00"
register "reg_adv_ctrl1" = "0x00"
register "reg_adv_ctrl2" = "0x00"
register "reg_adv_ctrl3" = "0x00"
register "reg_adv_ctrl4" = "0x00"
register "reg_adv_ctrl5" = "0x05"
register "reg_adv_ctrl6" = "0x00"
register "reg_adv_ctrl7" = "0x00"
register "reg_adv_ctrl8" = "0x00"
register "reg_adv_ctrl9" = "0x00"
register "reg_adv_ctrl10" = "0x00"
register "reg_adv_ctrl11" = "0x00"
register "reg_adv_ctrl12" = "0x00"
register "reg_adv_ctrl13" = "0x00"
register "reg_adv_ctrl14" = "0x80"
register "reg_adv_ctrl15" = "0x0c"
register "reg_adv_ctrl16" = "0x04"
register "reg_adv_ctrl17" = "0x70"
register "reg_adv_ctrl18" = "0x40"
register "reg_adv_ctrl19" = "0x00"
register "reg_adv_ctrl20" = "0x00"
register "reg_irq_msk" = "0x6f"
register "reg_irq_cfg0" = "0x00"
register "reg_irq_cfg1" = "0x80"
register "reg_irq_cfg2" = "0x00"
device i2c 28 on end
end
end # I2C 5
device pci 1f.0 on
chip drivers/pc80/tpm
device pnp 0c31.0 on end # Discrete TPM
end # chip drivers/pc80/tpm
end # PCH eSPI
device pci 1e.2 off end # GSPI 0
device pci 1f.3 on
chip drivers/generic/alc1015
register "sdb" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D17)"
device generic 0 on
probe AUDIO_AMP RT1015P_AUTO
end
end
end # Intel HDA
end
end

23
src/mainboard/google/dedede/variants/gooey/variant.c Normal file
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@ -0,0 +1,23 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <acpi/acpi.h>
#include <baseboard/variants.h>
#include <delay.h>
#include <gpio.h>
static void power_off_lte_module(void)
{
gpio_output(GPP_H17, 0);
mdelay(10);
gpio_output(GPP_A10, 0);
}
void variant_smi_sleep(u8 slp_typ)
{
/*
* Once the FW_CONFIG is provisioned, power off LTE module only under
* the situation where it is stuffed.
*/
if (slp_typ == ACPI_S5)
power_off_lte_module();
}