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soc/intel/cannonlake: Add Comet Lake H SA 4+2 Device ID 

This patch adds CML-H 4+2 SA DID into systemagent.c and report
platform.
According to doc #605546:
    CML-H (4+2) R1: 9B64h

BUG:none
BRANCH:none
TEST:build no error

Change-Id: I5bac6173a84a11abd2ce17f82854fbb14fb8558b
Signed-off-by: Jamie Chen <jamie.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37873
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
This commit is contained in:
Jamie Chen 2019-12-20 19:30:33 +08:00 committed by Edward O'Callaghan
parent 1c9746ceaf
commit 6bb9aaf93f
3 changed files with 3 additions and 0 deletions
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1
src/include/device/pci_ids.h
View File

@ -3403,6 +3403,7 @@
#define PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2 0x9B35
#define PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2 0x9B43
#define PCI_DEVICE_ID_INTEL_CML_H 0x9B54
#define PCI_DEVICE_ID_INTEL_CML_H_4_2 0x9B64
#define PCI_DEVICE_ID_INTEL_CML_H_8_2 0x9B44
#define PCI_DEVICE_ID_INTEL_TGL_ID_U 0x9A14
#define PCI_DEVICE_ID_INTEL_TGL_ID_U_1 0x9A12

1
src/soc/intel/cannonlake/bootblock/report_platform.c
View File

@ -84,6 +84,7 @@ static struct {
{ PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2, "CometLake-S P0/P1 (8+2)" },
{ PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2, "CometLake-S P0/P1 (10+2)" },
{ PCI_DEVICE_ID_INTEL_CML_H, "CometLake-H (6+2)" },
{ PCI_DEVICE_ID_INTEL_CML_H_4_2, "CometLake-H (4+2)" },
{ PCI_DEVICE_ID_INTEL_CML_H_8_2, "CometLake-H (8+2)" },
};

1
src/soc/intel/common/block/systemagent/systemagent.c
View File

@ -363,6 +363,7 @@ static const unsigned short systemagent_ids[] = {
PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2,
PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2,
PCI_DEVICE_ID_INTEL_CML_H,
PCI_DEVICE_ID_INTEL_CML_H_4_2,
PCI_DEVICE_ID_INTEL_CML_H_8_2,
PCI_DEVICE_ID_INTEL_TGL_ID_U,
PCI_DEVICE_ID_INTEL_TGL_ID_U_1,