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cpu/x86/mtrr: Fix sign overflow 

Use unsigned long to prevent sign overflow.
Fixes wrong MTRRs settings on x86_64 romstage.

Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Change-Id: I71b61a45becc17bf60a619e4131864c82a16b0d1
Reviewed-on: https://review.coreboot.org/c/30502
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Patrick Rudolph 2018-12-27 11:41:35 +01:00 committed by Patrick Georgi
parent 8d010db58e
commit 6bbc8d8050
1 changed files with 1 additions and 1 deletions
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src/include/cpu/x86/mtrr.h
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@ -150,7 +150,7 @@ static inline unsigned int fls(unsigned int x)
#define _ALIGN_DOWN_POW2(x) ((x) & ~_POW2_MASK(x)) #define _ALIGN_DOWN_POW2(x) ((x) & ~_POW2_MASK(x))
/* Calculate `4GiB - x` (e.g. absolute address for offset from 4GiB) */ /* Calculate `4GiB - x` (e.g. absolute address for offset from 4GiB) */
#define _FROM_4G_TOP(x) (((1 << 20) - ((x) >> 12)) << 12) #define _FROM_4G_TOP(x) (((1UL << 20) - ((x) >> 12)) << 12)
/* At the end of romstage, low RAM 0..CACHE_TM_RAMTOP may be set /* At the end of romstage, low RAM 0..CACHE_TM_RAMTOP may be set
* as write-back cacheable to speed up ramstage decompression. * as write-back cacheable to speed up ramstage decompression.