sc7180: Add AOP firmware support
Developer/Reviewer, be aware of this patch from Napali: https://review.coreboot.org/c/coreboot/+/25210/85 Change-Id: I1cd552fbf03b5135e5911f1143f8778cad81e360 Signed-off-by: Ashwin Kumar <ashk@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35502 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
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7 changed files with 85 additions and 2 deletions
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@ -40,6 +40,7 @@ ramstage-y += gpio.c
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ramstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c
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ramstage-y += clock.c
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ramstage-$(CONFIG_SC7180_QSPI) += qspi.c
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ramstage-y += aop_load_reset.c
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################################################################################
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43
src/soc/qualcomm/sc7180/aop_load_reset.c
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src/soc/qualcomm/sc7180/aop_load_reset.c
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@ -0,0 +1,43 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2019, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <string.h>
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#include <arch/cache.h>
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#include <cbfs.h>
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#include <halt.h>
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#include <console/console.h>
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#include <timestamp.h>
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#include <soc/mmu.h>
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#include <soc/aop.h>
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#include <soc/clock.h>
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void aop_fw_load_reset(void)
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{
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bool aop_fw_entry;
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struct prog aop_fw_prog =
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PROG_INIT(PROG_PAYLOAD, CONFIG_CBFS_PREFIX "/aop");
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if (prog_locate(&aop_fw_prog))
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die("SOC image: AOP_FW not found");
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aop_fw_entry = selfload(&aop_fw_prog);
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if (!aop_fw_entry)
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die("SOC image: AOP load failed");
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clock_reset_aop();
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printk(BIOS_DEBUG, "\nSOC:AOP brought out of reset.\n");
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}
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21
src/soc/qualcomm/sc7180/include/soc/aop.h
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21
src/soc/qualcomm/sc7180/include/soc/aop.h
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@ -0,0 +1,21 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2019, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _SOC_QUALCOMM_SC7180_AOP_H__
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#define _SOC_QUALCOMM_SC7180_AOP_H__
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void aop_fw_load_reset(void);
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#endif // _SOC_QUALCOMM_SC7180_AOP_H__
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@ -24,8 +24,16 @@
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#define BSRAM_START(addr) SYMBOL(bsram, addr)
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#define BSRAM_END(addr) SYMBOL(ebsram, addr)
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/* AOP : 0x0B000000 - 0x0B100000 */
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#define AOPSRAM_START(addr) SYMBOL(aopsram, addr)
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#define AOPSRAM_END(addr) SYMBOL(eaopsram, addr)
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SECTIONS
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{
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AOPSRAM_START(0x0B000000)
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REGION(aop, 0x0B000000, 0x100000, 4096)
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AOPSRAM_END(0x0B100000)
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SSRAM_START(0x14680000)
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OVERLAP_VERSTAGE_ROMSTAGE(0x14680000, 100K)
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REGION(qcsdi, 0x14699000, 52K, 4K)
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@ -52,6 +60,7 @@ SECTIONS
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DRAM_START(0x80000000)
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/* Various hardware/software subsystems make use of this area */
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REGION(dram_aop, 0x80800000, 0x040000, 0x1000)
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REGION(dram_soc, 0x80900000, 0x300000, 0x1000)
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BL31(0x80C00000, 0x1A800000)
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POSTRAM_CBFS_CACHE(0x9F800000, 16M)
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@ -25,5 +25,6 @@ DECLARE_REGION(dram_soc)
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DECLARE_REGION(dcb)
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DECLARE_REGION(pmic)
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DECLARE_REGION(limits_cfg)
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DECLARE_REGION(aop)
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#endif /* _SOC_QUALCOMM_SC7180_SYMBOLS_H_ */
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@ -32,3 +32,8 @@ void sc7180_mmu_init(void)
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mmu_enable();
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}
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void soc_mmu_dram_config_post_dram_init(void)
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{
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mmu_config_range((void *)_aop, REGION_SIZE(aop), CACHED_RAM);
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}
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@ -18,18 +18,21 @@
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#include <soc/mmu.h>
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#include <soc/mmu_common.h>
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#include <soc/symbols.h>
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#include <soc/aop.h>
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static void soc_read_resources(struct device *dev)
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{
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ram_resource(dev, 0, (uintptr_t)ddr_region->offset / KiB,
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ddr_region->size / KiB);
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reserved_ram_resource(dev, 1, (uintptr_t)_dram_soc / KiB,
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reserved_ram_resource(dev, 1, (uintptr_t)_dram_aop / KiB,
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REGION_SIZE(dram_aop) / KiB);
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reserved_ram_resource(dev, 2, (uintptr_t)_dram_soc / KiB,
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REGION_SIZE(dram_soc) / KiB);
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}
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static void soc_init(struct device *dev)
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{
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aop_fw_load_reset();
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}
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static struct device_operations soc_ops = {
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