mb/system76/lemp9: Configure IRQs as level triggered for HID over I2C

As per HID over I2C Protocol Specification[1] Version 1.00 Section 7.4,
the interrupt line used by the device is required to be level triggered.
Hence, this change updates the configuration of the HID over I2C devices
to be level triggered.

References:
[1] http://download.microsoft.com/download/7/d/d/7dd44bb7-2a7a-4505-ac1c-7227d3d96d5b/hid-over-i2c-protocol-spec-v1-0.docx

BUG=b:172846122
TEST=./util/abuild/abuild

Change-Id: Ice096777077bd2e9cfbaf744371fc372c0c05606
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50452
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Karthikeyan Ramasubramanian 2021-02-09 15:03:33 -07:00 committed by Patrick Georgi
parent b3a7c84b43
commit 6bcaf6f908
1 changed files with 1 additions and 1 deletions

View File

@ -97,7 +97,7 @@ chip soc/intel/cannonlake
chip drivers/i2c/hid
register "generic.hid" = ""ELAN040D""
register "generic.desc" = ""ELAN Touchpad""
register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_B3_IRQ)"
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
register "generic.probed" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 15 on end