lib/regscript: Add exclusive-or (xor) support
Add xor support which enables toggling of a bit: * REG_SCRIPT_COMMAND_RXW enum value * REG_*_RXW* macros to support using REG_SCRIPT_COMMAND_RXW * REG_*_XOR* macros to support using REG_SCRIPT_COMMAND_RXW * reg_script_rxw routine to perform and/xor operation * case in reg_script_run_step to call reg_script_rxw TEST=Build and run on Galileo Gen2 Change-Id: I50a492c7c2643df5dc2d2fa7113e3722c1e480c7 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/14495 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Lee Leahy
Leroy P Leahy
parent
733b39aed4
commit
6bcbe5749b
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@ -43,6 +43,7 @@ enum {
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REG_SCRIPT_COMMAND_READ,
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REG_SCRIPT_COMMAND_WRITE,
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REG_SCRIPT_COMMAND_RMW,
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REG_SCRIPT_COMMAND_RXW,
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REG_SCRIPT_COMMAND_POLL,
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REG_SCRIPT_COMMAND_SET_DEV,
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REG_SCRIPT_COMMAND_NEXT,
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@ -156,6 +157,12 @@ const struct reg_script_bus_entry *platform_bus_table(size_t *table_entries);
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REG_SCRIPT_PCI(RMW, 16, reg_, mask_, value_, 0)
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#define REG_PCI_RMW32(reg_, mask_, value_) \
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REG_SCRIPT_PCI(RMW, 32, reg_, mask_, value_, 0)
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#define REG_PCI_RXW8(reg_, mask_, value_) \
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REG_SCRIPT_PCI(RXW, 8, reg_, mask_, value_, 0)
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#define REG_PCI_RXW16(reg_, mask_, value_) \
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REG_SCRIPT_PCI(RXW, 16, reg_, mask_, value_, 0)
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#define REG_PCI_RXW32(reg_, mask_, value_) \
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REG_SCRIPT_PCI(RXW, 32, reg_, mask_, value_, 0)
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#define REG_PCI_OR8(reg_, value_) \
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REG_SCRIPT_PCI(RMW, 8, reg_, 0xff, value_, 0)
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#define REG_PCI_OR16(reg_, value_) \
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@ -168,6 +175,12 @@ const struct reg_script_bus_entry *platform_bus_table(size_t *table_entries);
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REG_SCRIPT_PCI(POLL, 16, reg_, mask_, value_, timeout_)
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#define REG_PCI_POLL32(reg_, mask_, value_, timeout_) \
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REG_SCRIPT_PCI(POLL, 32, reg_, mask_, value_, timeout_)
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#define REG_PCI_XOR8(reg_, value_) \
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REG_SCRIPT_PCI(RXW, 8, reg_, 0xff, value_, 0)
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#define REG_PCI_XOR16(reg_, value_) \
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REG_SCRIPT_PCI(RXW, 16, reg_, 0xffff, value_, 0)
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#define REG_PCI_XOR32(reg_, value_) \
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REG_SCRIPT_PCI(RXW, 32, reg_, 0xffffffff, value_, 0)
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/*
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* Legacy IO
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@ -196,6 +209,12 @@ const struct reg_script_bus_entry *platform_bus_table(size_t *table_entries);
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REG_SCRIPT_IO(RMW, 16, reg_, mask_, value_, 0)
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#define REG_IO_RMW32(reg_, mask_, value_) \
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REG_SCRIPT_IO(RMW, 32, reg_, mask_, value_, 0)
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#define REG_IO_RXW8(reg_, mask_, value_) \
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REG_SCRIPT_IO(RXW, 8, reg_, mask_, value_, 0)
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#define REG_IO_RXW16(reg_, mask_, value_) \
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REG_SCRIPT_IO(RXW, 16, reg_, mask_, value_, 0)
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#define REG_IO_RXW32(reg_, mask_, value_) \
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REG_SCRIPT_IO(RXW, 32, reg_, mask_, value_, 0)
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#define REG_IO_OR8(reg_, value_) \
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REG_IO_RMW8(reg_, 0xff, value_)
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#define REG_IO_OR16(reg_, value_) \
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@ -208,6 +227,12 @@ const struct reg_script_bus_entry *platform_bus_table(size_t *table_entries);
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REG_SCRIPT_IO(POLL, 16, reg_, mask_, value_, timeout_)
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#define REG_IO_POLL32(reg_, mask_, value_, timeout_) \
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REG_SCRIPT_IO(POLL, 32, reg_, mask_, value_, timeout_)
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#define REG_IO_XOR8(reg_, value_) \
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REG_IO_RXW8(reg_, 0xff, value_)
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#define REG_IO_XOR16(reg_, value_) \
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REG_IO_RXW16(reg_, 0xffff, value_)
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#define REG_IO_XOR32(reg_, value_) \
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REG_IO_RXW32(reg_, 0xffffffff, value_)
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/*
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* Memory Mapped IO
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@ -236,6 +261,12 @@ const struct reg_script_bus_entry *platform_bus_table(size_t *table_entries);
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REG_SCRIPT_MMIO(RMW, 16, reg_, mask_, value_, 0)
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#define REG_MMIO_RMW32(reg_, mask_, value_) \
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REG_SCRIPT_MMIO(RMW, 32, reg_, mask_, value_, 0)
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#define REG_MMIO_RXW8(reg_, mask_, value_) \
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REG_SCRIPT_MMIO(RXW, 8, reg_, mask_, value_, 0)
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#define REG_MMIO_RXW16(reg_, mask_, value_) \
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REG_SCRIPT_MMIO(RXW, 16, reg_, mask_, value_, 0)
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#define REG_MMIO_RXW32(reg_, mask_, value_) \
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REG_SCRIPT_MMIO(RXW, 32, reg_, mask_, value_, 0)
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#define REG_MMIO_OR8(reg_, value_) \
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REG_MMIO_RMW8(reg_, 0xff, value_)
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#define REG_MMIO_OR16(reg_, value_) \
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@ -248,6 +279,12 @@ const struct reg_script_bus_entry *platform_bus_table(size_t *table_entries);
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REG_SCRIPT_MMIO(POLL, 16, reg_, mask_, value_, timeout_)
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#define REG_MMIO_POLL32(reg_, mask_, value_, timeout_) \
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REG_SCRIPT_MMIO(POLL, 32, reg_, mask_, value_, timeout_)
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#define REG_MMIO_XOR8(reg_, value_) \
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REG_MMIO_RXW8(reg_, 0xff, value_)
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#define REG_MMIO_XOR16(reg_, value_) \
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REG_MMIO_RXW16(reg_, 0xffff, value_)
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#define REG_MMIO_XOR32(reg_, value_) \
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REG_MMIO_RXW32(reg_, 0xffffffff, value_)
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/*
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* Access through a device's resource such as a Base Address Register (BAR)
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@ -276,6 +313,12 @@ const struct reg_script_bus_entry *platform_bus_table(size_t *table_entries);
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REG_SCRIPT_RES(RMW, 16, bar_, reg_, mask_, value_, 0)
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#define REG_RES_RMW32(bar_, reg_, mask_, value_) \
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REG_SCRIPT_RES(RMW, 32, bar_, reg_, mask_, value_, 0)
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#define REG_RES_RXW8(bar_, reg_, mask_, value_) \
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REG_SCRIPT_RES(RXW, 8, bar_, reg_, mask_, value_, 0)
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#define REG_RES_RXW16(bar_, reg_, mask_, value_) \
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REG_SCRIPT_RES(RXW, 16, bar_, reg_, mask_, value_, 0)
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#define REG_RES_RXW32(bar_, reg_, mask_, value_) \
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REG_SCRIPT_RES(RXW, 32, bar_, reg_, mask_, value_, 0)
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#define REG_RES_OR8(bar_, reg_, value_) \
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REG_RES_RMW8(bar_, reg_, 0xff, value_)
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#define REG_RES_OR16(bar_, reg_, value_) \
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@ -288,6 +331,12 @@ const struct reg_script_bus_entry *platform_bus_table(size_t *table_entries);
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REG_SCRIPT_RES(POLL, 16, bar_, reg_, mask_, value_, timeout_)
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#define REG_RES_POLL32(bar_, reg_, mask_, value_, timeout_) \
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REG_SCRIPT_RES(POLL, 32, bar_, reg_, mask_, value_, timeout_)
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#define REG_RES_XOR8(bar_, reg_, value_) \
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REG_RES_RXW8(bar_, reg_, 0xff, value_)
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#define REG_RES_XOR16(bar_, reg_, value_) \
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REG_RES_RXW16(bar_, reg_, 0xffff, value_)
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#define REG_RES_XOR32(bar_, reg_, value_) \
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REG_RES_RXW32(bar_, reg_, 0xffffffff, value_)
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#if IS_ENABLED(CONFIG_SOC_INTEL_BAYTRAIL) || \
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@ -307,10 +356,14 @@ IS_ENABLED(CONFIG_SOC_INTEL_FSP_BAYTRAIL)
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REG_SCRIPT_IOSF(WRITE, unit_, reg_, 0, value_, 0)
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#define REG_IOSF_RMW(unit_, reg_, mask_, value_) \
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REG_SCRIPT_IOSF(RMW, unit_, reg_, mask_, value_, 0)
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#define REG_IOSF_RXW(unit_, reg_, mask_, value_) \
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REG_SCRIPT_IOSF(RXW, unit_, reg_, mask_, value_, 0)
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#define REG_IOSF_OR(unit_, reg_, value_) \
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REG_IOSF_RMW(unit_, reg_, 0xffffffff, value_)
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#define REG_IOSF_POLL(unit_, reg_, mask_, value_, timeout_) \
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REG_SCRIPT_IOSF(POLL, unit_, reg_, mask_, value_, timeout_)
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#define REG_IOSF_XOR(unit_, reg_, value_) \
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REG_IOSF_RXW(unit_, reg_, 0xffffffff, value_)
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#endif /* CONFIG_SOC_INTEL_BAYTRAIL || CONFIG_SOC_INTEL_FSP_BAYTRAIL*/
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/*
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@ -328,10 +381,14 @@ IS_ENABLED(CONFIG_SOC_INTEL_FSP_BAYTRAIL)
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REG_SCRIPT_MSR(WRITE, reg_, 0, value_, 0)
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#define REG_MSR_RMW(reg_, mask_, value_) \
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REG_SCRIPT_MSR(RMW, reg_, mask_, value_, 0)
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#define REG_MSR_RXW(reg_, mask_, value_) \
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REG_SCRIPT_MSR(RXW, reg_, mask_, value_, 0)
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#define REG_MSR_OR(reg_, value_) \
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REG_MSR_RMW(reg_, -1ULL, value_)
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#define REG_MSR_POLL(reg_, mask_, value_, timeout_) \
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REG_SCRIPT_MSR(POLL, reg_, mask_, value_, timeout_)
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#define REG_MSR_XOR(reg_, value_) \
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REG_MSR_RXW(reg_, -1ULL, value_)
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/*
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* Chain to another table.
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@ -521,6 +521,41 @@ static void reg_script_rmw(struct reg_script_context *ctx)
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reg_script_set_step(ctx, step);
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}
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static void reg_script_rxw(struct reg_script_context *ctx)
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{
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uint64_t value;
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const struct reg_script *step = reg_script_get_step(ctx);
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struct reg_script write_step = *step;
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/*
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* XOR logic table
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* Input XOR Value
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* 0 0 0
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* 0 1 1
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* 1 0 1
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* 1 1 0
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*
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* Supported operations
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*
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* Input Mask Temp XOR Value Operation
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* 0 0 0 0 0 Clear bit
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* 1 0 0 0 0
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* 0 0 0 1 1 Set bit
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* 1 0 0 1 1
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* 0 1 0 0 0 Preserve bit
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* 1 1 1 0 1
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* 0 1 0 1 1 Toggle bit
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* 1 1 1 1 0
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*/
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value = reg_script_read(ctx);
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value &= step->mask;
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value ^= step->value;
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write_step.value = value;
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reg_script_set_step(ctx, &write_step);
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reg_script_write(ctx);
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reg_script_set_step(ctx, step);
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}
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/* In order to easily chain scripts together handle the REG_SCRIPT_COMMAND_NEXT
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* as recursive call with a new context that has the same dev and resource
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* as the previous one. That will run to completion and then move on to the
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@ -544,6 +579,9 @@ static void reg_script_run_step(struct reg_script_context *ctx,
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case REG_SCRIPT_COMMAND_RMW:
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reg_script_rmw(ctx);
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break;
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case REG_SCRIPT_COMMAND_RXW:
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reg_script_rxw(ctx);
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break;
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case REG_SCRIPT_COMMAND_POLL:
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for (try = 0; try < step->timeout; try += POLL_DELAY) {
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value = reg_script_read(ctx) & step->mask;
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