GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/amd/common/block/acpi.ivrs: use SMBUS_DEVFN for FCH IOAPIC device ID 

Instead of using PCI_DEVFN(SMBUS_DEV, SMBUS_FUNC), use the equivalent
SMBUS_DEVFN define.

Even though the FCH IOAPIC is in the LPC part of the FCH, it needs the
IVRS IOAPIC table's source_dev_id field set to SMBUS_DEVFN which is the
function 0 of the FCH PCI device. LPC is function 3 of the FCH device.

When assigning LPC_DEVFN to source_dev_id, the kernel from Ubuntu
2022.04 LTS complains about the IOAPIC part of the IVRS table being
wrong:

AMD-Vi: [Firmware Bug]: : No southbridge IOAPIC found
AMD-Vi: Disabling interrupt remapping

With SMBUS_DEVFN being used as source_dev_id, no such error is reported.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Suggested-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Change-Id: I8470d67b2513031e75fb422d4c1c181e017ace0a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70503
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Felix Held 2022-12-08 18:33:40 +01:00
parent 6a1af48c58
commit 6c11676dc6
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/soc/amd/common/block/acpi/ivrs.c
View File

@ -29,7 +29,7 @@ unsigned long acpi_fill_ivrs_ioapic(acpi_ivrs_t *ivrs, unsigned long current)
IVHD_DTE_SYS_MGT_NO_TRANS | IVHD_DTE_NMI_PASS | IVHD_DTE_SYS_MGT_NO_TRANS | IVHD_DTE_NMI_PASS |
IVHD_DTE_EXT_INT_PASS | IVHD_DTE_INIT_PASS; IVHD_DTE_EXT_INT_PASS | IVHD_DTE_INIT_PASS;
ivhd_ioapic->handle = get_ioapic_id(VIO_APIC_VADDR); ivhd_ioapic->handle = get_ioapic_id(VIO_APIC_VADDR);
ivhd_ioapic->source_dev_id = PCI_DEVFN(SMBUS_DEV, SMBUS_FUNC); ivhd_ioapic->source_dev_id = SMBUS_DEVFN; /* function 0 of FCH PCI device */
ivhd_ioapic->variety = IVHD_SPECIAL_DEV_IOAPIC; ivhd_ioapic->variety = IVHD_SPECIAL_DEV_IOAPIC;
current += sizeof(ivrs_ivhd_special_t); current += sizeof(ivrs_ivhd_special_t);
@ -53,7 +53,7 @@ static unsigned long ivhd_describe_hpet(unsigned long current)
ivhd_hpet->reserved = 0x0000; ivhd_hpet->reserved = 0x0000;
ivhd_hpet->dte_setting = 0x00; ivhd_hpet->dte_setting = 0x00;
ivhd_hpet->handle = 0x00; ivhd_hpet->handle = 0x00;
ivhd_hpet->source_dev_id = PCI_DEVFN(SMBUS_DEV, SMBUS_FUNC); ivhd_hpet->source_dev_id = SMBUS_DEVFN; /* function 0 of FCH PCI device */
ivhd_hpet->variety = IVHD_SPECIAL_DEV_HPET; ivhd_hpet->variety = IVHD_SPECIAL_DEV_HPET;
current += sizeof(ivrs_ivhd_special_t); current += sizeof(ivrs_ivhd_special_t);