From 6c19cb53eebdc615c86165653d68c1aa71247ce0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Tue, 8 Jan 2019 19:14:41 +0200 Subject: [PATCH] arch/x86: Remove weak tsc_freq_mhz() implementation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Build with TSC_CONSTANT_RATE must fail when this function is not implemented for the platform. Weak implementation causes division by zero in timer_monotonic_get() and turns udelay() into no delay. Change-Id: Id3b105ea3aac37cd0cba18ce2fb06d87a055486f Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/30762 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Aaron Durbin --- src/arch/x86/timestamp.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/src/arch/x86/timestamp.c b/src/arch/x86/timestamp.c index 928d7d7402..b5257c4c7e 100644 --- a/src/arch/x86/timestamp.c +++ b/src/arch/x86/timestamp.c @@ -21,15 +21,14 @@ uint64_t timestamp_get(void) return rdtscll(); } -unsigned long __weak tsc_freq_mhz(void) -{ - /* Default to not knowing TSC frequency. cbmem will have to fallback - * on trying to determine it in userspace. */ - return 0; -} - int timestamp_tick_freq_mhz(void) { /* Chipsets that have a constant TSC provide this value correctly. */ - return tsc_freq_mhz(); + if (IS_ENABLED(CONFIG_TSC_CONSTANT_RATE)) + return tsc_freq_mhz(); + + /* Filling tick_freq_mhz = 0 in timestamps-table will trigger + * userspace utility to try deduce it from the running system. + */ + return 0; }