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mb/google/brask/var/baseboard/brask: Update GPIO GPP_B5 and GPP_B6 

Update GPIO GPP_B5 and GPP_B6 based on schematics.

BUG=b:197385770
TEST=build pass

Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Change-Id: If83e02eec7c48b9ab41d346aa8baef7c0c881df1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58050
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Zhuohao Lee <zhuohao@google.com>
This commit is contained in:
David Wu 2021-09-30 20:05:41 +08:00 committed by Felix Held
parent b1e4a9a6c3
commit 6c2d99f618
1 changed files with 4 additions and 4 deletions
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8
src/mainboard/google/brya/variants/baseboard/brask/gpio.c
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@ -61,10 +61,10 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_B3, NONE),
/* B4 : PROC_GP3 ==> SSD_PERST_L */
PAD_CFG_GPO(GPP_B4, 1, DEEP),
/* B5 : ISH_I2C0_SDA ==> NC */
PAD_NC(GPP_B5, NONE),
/* B6 : ISH_I2C0_SCL ==> NC */
PAD_NC(GPP_B6, NONE),
/* B5 : ISH_I2C0_SDA ==> PCH_I2C_MISC_SDA */
PAD_CFG_NF(GPP_B5, NONE, DEEP, NF2),
/* B6 : ISH_I2C0_SCL ==> PCH_I2C_MISC_SCL */
PAD_CFG_NF(GPP_B6, NONE, DEEP, NF2),
/* B7 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF(GPP_B7, NONE, DEEP, NF2),
/* B8 : ISH_I2C1_SCL ==> PCH_I2C_TPM_SCL */