ck804 pref mem 4G above support
Signed-off-by: Yinghai Lu <yinghai.lu@amd.com> Acked-by: Yinghai Lu <yinghai.lu@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2532 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -14,6 +14,10 @@ static void pci_init(struct device *dev)
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{
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uint32_t dword;
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#if CONFIG_PCI_64BIT_PREF_MEM == 1
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device_t pci_domain_dev;
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struct resource *mem1, *mem2;
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#endif
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/* System error enable */
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dword = pci_read_config32(dev, 0x04);
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@ -34,8 +38,27 @@ static void pci_init(struct device *dev)
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pci_write_config32(dev, 0x4c, dword);
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#endif
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#if CONFIG_PCI_64BIT_PREF_MEM == 1
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pci_domain_dev = dev->bus->dev;
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while(pci_domain_dev) {
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if(pci_domain_dev->path.type == DEVICE_PATH_PCI_DOMAIN) break;
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pci_domain_dev = pci_domain_dev->bus->dev;
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}
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if(!pci_domain_dev) return; // impossiable
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mem1 = find_resource(pci_domain_dev, 1); // prefmem, it could be 64bit
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mem2 = find_resource(pci_domain_dev, 2); // mem
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if(mem1->base > mem2->base) {
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dword = mem2->base & (0xffff0000UL);
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printk_debug("PCI DOMAIN mem2 base = 0x%010Lx\n", mem2->base);
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} else {
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dword = mem1->base & (0xffff0000UL);
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printk_debug("PCI DOMAIN mem1 (prefmem) base = 0x%010Lx\n", mem1->base);
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}
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#else
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dword = dev_root.resource[1].base & (0xffff0000UL);
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printk_debug("dev_root mem base = 0x%010Lx\n", dev_root.resource[1].base);
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#endif
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printk_debug("[0x50] <-- 0x%08x\n", dword);
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pci_write_config32(dev, 0x50, dword); //TOM
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