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soc/qualcomm/common/spi: Configure SPI QUP driver 

This implements the SPI driver for the QUP core.

BUG=b:182963902
TEST=Validated on qualcomm sc7180 and sc7280 development board.

Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
Change-Id: I7e5d3ad07f68255727958d53e6919944d3038260
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56399
Reviewed-by: Shelley Chen <shchen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Ravi Kumar Bokka 2021-07-17 00:02:23 +05:30 committed by Shelley Chen
parent 4744c6ec1a
commit 6c3ad1341f
1 changed files with 13 additions and 0 deletions
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13
src/soc/qualcomm/common/spi.c
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@ -3,6 +3,7 @@
#include <spi-generic.h> #include <spi-generic.h>
#include <spi_flash.h> #include <spi_flash.h>
#include <soc/qspi_common.h> #include <soc/qspi_common.h>
#include <soc/qupv3_spi_common.h>
static const struct spi_ctrlr qspi_ctrlr = { static const struct spi_ctrlr qspi_ctrlr = {
.claim_bus = qspi_claim_bus, .claim_bus = qspi_claim_bus,
@ -12,12 +13,24 @@ static const struct spi_ctrlr qspi_ctrlr = {
.max_xfer_size = QSPI_MAX_PACKET_COUNT, .max_xfer_size = QSPI_MAX_PACKET_COUNT,
}; };
const struct spi_ctrlr spi_qup_ctrlr = {
.claim_bus = qup_spi_claim_bus,
.release_bus = qup_spi_release_bus,
.xfer = qup_spi_xfer,
.max_xfer_size = 65535,
};
const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
{ {
.ctrlr = &qspi_ctrlr, .ctrlr = &qspi_ctrlr,
.bus_start = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, .bus_start = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
.bus_end = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, .bus_end = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
}, },
{
.ctrlr = &spi_qup_ctrlr,
.bus_start = 0,
.bus_end = 15,
},
}; };
const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map);