Drop SuperIO nsc/pc97307
All boards using this SuperIO have been removed already. Change-Id: I667a8d15a2d16671115f62de656b1c5c6a8259b9 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/12240 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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@ -32,7 +32,5 @@ config SUPERIO_NSC_PC87392
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bool
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bool
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config SUPERIO_NSC_PC87417
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config SUPERIO_NSC_PC87417
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bool
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bool
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config SUPERIO_NSC_PC97307
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bool
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config SUPERIO_NSC_PC97317
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config SUPERIO_NSC_PC97317
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bool
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bool
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@ -24,5 +24,4 @@ subdirs-y += pc87382
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subdirs-y += pc87384
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subdirs-y += pc87384
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subdirs-y += pc87392
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subdirs-y += pc87392
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subdirs-y += pc87417
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subdirs-y += pc87417
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subdirs-y += pc97307
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subdirs-y += pc97317
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subdirs-y += pc97317
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@ -1,21 +0,0 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2000 AG Electronics Ltd.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc.
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##
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ramstage-$(CONFIG_SUPERIO_NSC_PC97307) += superio.c
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@ -1,34 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2000 AG Electronics Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#ifndef SUPERIO_NSC_PC97307_PC97307_H
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#define SUPERIO_NSC_PC97307_PC97307_H
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#define PC97307_KBCK 0x00 /* Keyboard */
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#define PC97307_KBCM 0x01 /* Mouse */
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#define PC97307_RTC 0x02 /* Real-Time Clock */
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#define PC97307_FDC 0x03 /* Floppy */
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#define PC97307_PP 0x04 /* Parallel port */
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#define PC97307_SP2 0x05 /* Com2 */
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#define PC97307_SP1 0x06 /* Com1 */
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#define PC97307_GPIO 0x07
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#define PC97307_PM 0x08 /* Power Management */
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#endif
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@ -1,85 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2000 AG Electronics Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#include <arch/io.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pnp.h>
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#include <stdlib.h>
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#include <pc80/keyboard.h>
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#include "pc97307.h"
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static void init(struct device *dev)
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{
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u8 reg8;
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if (!dev->enabled)
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return;
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switch(dev->path.pnp.device) {
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case PC97307_KBCK:
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pnp_set_logical_device(dev);
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pnp_set_enable(dev, 0); /* Disable keyboard */
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pnp_write_config(dev, 0xf0, 0x40); /* Set KBC clock to 8 MHz. */
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pnp_set_enable(dev, 1); /* Enable keyboard. */
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pc_keyboard_init();
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break;
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case PC97307_FDC:
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/* Set up floppy in PS/2 mode. */
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outb(0x09, SIO_CONFIG_RA);
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reg8 = inb(SIO_CONFIG_RD);
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reg8 = (reg8 & 0x3F) | 0x40;
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outb(reg8, SIO_CONFIG_RD);
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outb(reg8, SIO_CONFIG_RD); /* Have to write twice to change! */
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break;
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default:
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break;
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}
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}
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static struct device_operations ops = {
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.read_resources = pnp_read_resources,
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.set_resources = pnp_set_resources,
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.enable_resources = pnp_enable_resources,
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.enable = pnp_enable,
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.init = init,
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};
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static struct pnp_info pnp_dev_info[] = {
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{ &ops, PC97307_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x0ffb, 0}, {0x0ffb, 4}, },
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{ &ops, PC97307_KBCM, PNP_IRQ0, },
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{ &ops, PC97307_RTC, PNP_IO0 | PNP_IRQ0, {0xfffe, 0}, },
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{ &ops, PC97307_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0xfffa, 0}, },
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{ &ops, PC97307_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x03fc, 0}, },
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{ &ops, PC97307_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, {0xfff8, 0}, },
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{ &ops, PC97307_SP1, PNP_IO0 | PNP_IRQ0, {0xfff8, 0}, },
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{ &ops, PC97307_GPIO, PNP_IO0, {0xfff8, 0}, },
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{ &ops, PC97307_PM, PNP_IO0, {0xfffe, 0}, },
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};
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static void enable_dev(struct device *dev)
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{
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pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
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}
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struct chip_operations superio_nsc_pc97307_ops = {
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CHIP_NAME("NSC PC97307 Super I/O")
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.enable_dev = enable_dev,
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};
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