cpu/x86: Rename __protected_start symbol
It was confusing to have this defined while there was another symbol bootblock_protected_mode_entry that was not really used as an entry point. Change-Id: I3da07ba9c0a9fc15b1515452adfb27f963659951 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48404 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -125,7 +125,7 @@ _start16bit:
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movl %ebp, %eax
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/* Now that we are in protected mode jump to a 32 bit code segment. */
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ljmpl $ROM_CODE_SEG, $__protected_start
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ljmpl $ROM_CODE_SEG, $bootblock_protected_mode_entry
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/**
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* The gdt is defined in gdt_init.S, it has a 4 Gb code segment
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@ -25,8 +25,9 @@
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*/
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.align 4
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.globl __protected_start
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__protected_start:
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.globl bootblock_protected_mode_entry
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bootblock_protected_mode_entry:
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/* Save the BIST value */
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movl %eax, %ebp
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@ -54,14 +55,14 @@ debug_spinloop:
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jz debug_spinloop
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#endif
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bootblock_protected_mode_entry:
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#if !CONFIG(USE_MARCH_586)
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/* MMX registers required here */
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/* BIST result in eax */
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movd %eax, %mm0
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__timestamp:
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/* Get an early timestamp */
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rdtsc
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movd %eax, %mm1
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@ -26,7 +26,7 @@ _cache_as_ram_setup:
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/*
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* on entry:
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* mm0: BIST (ignored)
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* mm2_mm1: timestamp at bootblock_protected_mode_entry
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* mm2_mm1: timestamp
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*/
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bootblock_pre_c_entry:
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@ -21,7 +21,7 @@ _cache_as_ram_setup:
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/*
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* on entry:
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* mm0: BIST (ignored)
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* mm2_mm1: timestamp at bootblock_protected_mode_entry
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* mm2_mm1: timestamp
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*/
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.global bootblock_pre_c_entry
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@ -18,7 +18,7 @@ bootblock_resume_entry:
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/*
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* on entry:
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* mm0: BIST (ignored)
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* mm2_mm1: timestamp at bootblock_protected_mode_entry
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* mm2_mm1: timestamp
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*/
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.global bootblock_pre_c_entry
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