mb/siemens/{baseboard,mc_apl3,mc_apl4,mc_apl5}: Fix GPIO_168
This GPIO is corrected with reference to the Apollo Lake SoC EDS Vol 4 revision 2.4 chapter 10.1.2.3 List of Pins that are GPIOs but cannot be used in Function 0 (GPIO) mode. Change-Id: I98628ade3a1e19730ca6e6b4a63c28e6816176ce Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34197 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
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@ -49,7 +49,7 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPI(GPIO_166, DN_20K, DEEP), /* SDIO_CLK */
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PAD_CFG_GPI(GPIO_167, NONE, DEEP), /* SDIO_D0 */
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/* Configure SDIO to enable power gating. */
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PAD_CFG_GPI(GPIO_168, NONE, DEEP), /* SDIO_D1 */
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PAD_CFG_NF(GPIO_168, UP_20K, DEEP, NF1), /* SDIO_D1 */
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PAD_CFG_GPI(GPIO_169, NONE, DEEP), /* SDIO_D2 */
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PAD_CFG_GPI(GPIO_170, NONE, DEEP), /* SDIO_D3 */
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PAD_CFG_GPI(GPIO_171, NONE, DEEP), /* SDIO_CMD */
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@ -49,7 +49,7 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPI(GPIO_166, DN_20K, DEEP), /* SDIO_CLK */
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PAD_CFG_GPI(GPIO_167, UP_20K, DEEP), /* SDIO_D0 */
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/* Configure SDIO to enable power gating. */
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PAD_CFG_GPI(GPIO_168, UP_20K, DEEP), /* SDIO_D1 */
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PAD_CFG_NF(GPIO_168, UP_20K, DEEP, NF1), /* SDIO_D1 */
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PAD_CFG_GPI(GPIO_169, UP_20K, DEEP), /* SDIO_D2 */
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PAD_CFG_GPI(GPIO_170, UP_20K, DEEP), /* SDIO_D3 */
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PAD_CFG_GPI(GPIO_171, UP_20K, DEEP), /* SDIO_CMD */
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@ -47,7 +47,7 @@ static const struct pad_config gpio_table[] = {
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/* SDIO - unused */
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PAD_CFG_GPI(GPIO_166, DN_20K, DEEP),
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PAD_CFG_GPI(GPIO_167, DN_20K, DEEP),
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PAD_CFG_GPI(GPIO_168, DN_20K, DEEP),
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PAD_CFG_NF(GPIO_168, UP_20K, DEEP, NF1),
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PAD_CFG_GPI(GPIO_169, DN_20K, DEEP),
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PAD_CFG_GPI(GPIO_170, DN_20K, DEEP),
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PAD_CFG_GPI(GPIO_171, DN_20K, DEEP),
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@ -49,7 +49,7 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPI(GPIO_166, DN_20K, DEEP), /* SDIO_CLK */
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PAD_CFG_GPI(GPIO_167, NONE, DEEP), /* SDIO_D0 */
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/* Configure SDIO to enable power gating. */
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PAD_CFG_GPI(GPIO_168, NONE, DEEP), /* SDIO_D1 */
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PAD_CFG_NF(GPIO_168, UP_20K, DEEP, NF1), /* SDIO_D1 */
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PAD_CFG_GPI(GPIO_169, NONE, DEEP), /* SDIO_D2 */
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PAD_CFG_GPI(GPIO_170, NONE, DEEP), /* SDIO_D3 */
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PAD_CFG_GPI(GPIO_171, NONE, DEEP), /* SDIO_CMD */
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