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Fix typo and only output post code if the work was done. 

Thanks to Thomas Jourdan <thomas.jourdan@gmail.com> for reporting it.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4391 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Myles Watson 2009-07-01 16:34:03 +00:00
parent 08405e7411
commit 6c96517a13
1 changed files with 2 additions and 2 deletions
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4
src/cpu/intel/model_6fx/cache_as_ram_post.c
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@ -50,9 +50,9 @@
"wrmsr\n"
"movl $MTRRphysMask_MSR(1), %ecx\n"
"wrmsr\n"
#endif
"movb $0x33, %al\noutb %al, $0x80\n"
#endif
#ifdef CLEAR_FIRST_1M_RAM
"movb $0x34, %al\noutb %al, $0x80\n"
/* Enable Write Combining and Speculative Reads for the first 1MB */
@ -120,7 +120,7 @@
"movb $0x3b, %al\noutb %al, $0x80\n"
/* Enable prefetchers */
"movl $0x01a0, %eax\n"
"movl $0x01a0, %ecx\n"
"rdmsr\n"
"andl $~((1 << 9) | (1 << 19)), %eax\n"
"andl $~((1 << 5) | (1 << 7)), %edx\n"