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mb/google/nissa/var/nivviks: Use interrupt with lock for pen detect GPIO 

With GPIO_DRIVER_LOCK kernel driver can't change to IRQ. Thus, we need
to set it as INT in coreboot to make the IRQ work.

BUG=b:223476974
TEST=evtest work as expected.
Input driver version is 1.0.1
Input device ID: bus 0x19 vendor 0x1 product 0x1 version 0x100
Input device name: "PRP0001:00"
Supported events:
  Event type 0 (EV_SYN)
  Event type 5 (EV_SW)
    Event code 15 (SW_PEN_INSERTED) state 0
Properties:
Testing ... (interrupt to exit)
Event: type 5 (EV_SW), code 15 (SW_PEN_INSERTED), value 1
Event: -------------- SYN_REPORT ------------
Event: type 5 (EV_SW), code 15 (SW_PEN_INSERTED), value 0

Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: I5f9fdfb2622b4b955da216119e74c6f7d5795d36
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64091
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
This commit is contained in:
Eric Lai 2022-05-06 15:26:13 +08:00 committed by Werner Zeh
parent 2e96eebf01
commit 6cb787b19a
1 changed files with 1 additions and 1 deletions
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2
src/mainboard/google/brya/variants/baseboard/nissa/gpio.c
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@ -234,7 +234,7 @@ static const struct pad_config gpio_table[] = {
/* F12 : GSXDOUT ==> WWAN_RST_L */ /* F12 : GSXDOUT ==> WWAN_RST_L */
PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG), PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG),
/* F13 : GSXSLOAD ==> SOC_PEN_DETECT_R_ODL */ /* F13 : GSXSLOAD ==> SOC_PEN_DETECT_R_ODL */
PAD_CFG_GPI_GPIO_DRIVER_LOCK(GPP_F13, NONE, LOCK_CONFIG), PAD_CFG_GPI_INT_LOCK(GPP_F13, NONE, EDGE_BOTH, LOCK_CONFIG),
/* F14 : GSXDIN ==> TCHPAD_INT_ODL */ /* F14 : GSXDIN ==> TCHPAD_INT_ODL */
PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_F14, NONE, LEVEL, INVERT, LOCK_CONFIG), PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_F14, NONE, LEVEL, INVERT, LOCK_CONFIG),
/* F15 : GSXSRESET# ==> SOC_PEN_DETECT_ODL */ /* F15 : GSXSRESET# ==> SOC_PEN_DETECT_ODL */