From 6cc0e084eaf4dbdfa3d2e2295a6b931370c64cb9 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Sat, 26 Nov 2005 00:10:10 +0000 Subject: [PATCH] first round of agami aruma merge git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2107 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/agami/aruma/Config.lb | 2 +- src/mainboard/agami/aruma/Options.lb | 6 +++-- src/mainboard/agami/aruma/acpi_tables.c | 27 +++++++++++++++++++++- src/mainboard/agami/aruma/auto.c | 5 ++-- src/mainboard/agami/aruma/fadt.c | 2 +- src/southbridge/amd/amd8111/amd8111_acpi.c | 10 ++++++++ 6 files changed, 45 insertions(+), 7 deletions(-) diff --git a/src/mainboard/agami/aruma/Config.lb b/src/mainboard/agami/aruma/Config.lb index c9f0d86f3f..e2e1557a1f 100644 --- a/src/mainboard/agami/aruma/Config.lb +++ b/src/mainboard/agami/aruma/Config.lb @@ -177,7 +177,7 @@ chip northbridge/amd/amdk8/root_complex io 0x60 = 0x3f8 irq 0x70 = 4 end - device pnp 2e.3 off # Com2 + device pnp 2e.3 on # Com2 io 0x60 = 0x2f8 irq 0x70 = 3 end diff --git a/src/mainboard/agami/aruma/Options.lb b/src/mainboard/agami/aruma/Options.lb index c44fcd8ea4..9fab69b82a 100644 --- a/src/mainboard/agami/aruma/Options.lb +++ b/src/mainboard/agami/aruma/Options.lb @@ -74,9 +74,9 @@ default FALLBACK_SIZE=0x40000 default HAVE_FALLBACK_BOOT=1 ## -## incoherent_ht.c does all the work. we don't want hard reset. +## Use hard_reset for rebooting, it uses reg. 0xcf9 in the amd8111. ## -default HAVE_HARD_RESET=0 +default HAVE_HARD_RESET=1 ## ## Build code to export a programmable irq routing table @@ -205,6 +205,8 @@ default TTYS0_LCS=0x3 ## DEBUG 8 debug-level messages ## SPEW 9 Way too many details + +## These values can be overwritten by LinuxBIOSv2/targets/agami/aruma/Config.lb ## Request this level of debugging output default DEFAULT_CONSOLE_LOGLEVEL=8 ## At a maximum only compile in this level of debugging diff --git a/src/mainboard/agami/aruma/acpi_tables.c b/src/mainboard/agami/aruma/acpi_tables.c index 3d98d505a4..004de3d407 100644 --- a/src/mainboard/agami/aruma/acpi_tables.c +++ b/src/mainboard/agami/aruma/acpi_tables.c @@ -16,7 +16,7 @@ extern unsigned char AmlCode[]; unsigned long acpi_dump_apics(unsigned long current) { - unsigned int gsi_base=0x18, ioapic_nr=2; + unsigned int gsi_base=0x18, ioapic_nr=2, i; device_t dev=0; /* create all subtables for 4p */ @@ -29,6 +29,30 @@ unsigned long acpi_dump_apics(unsigned long current) current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, 1, IO_APIC_ADDR, 0); + /* Write the two onboard 8131 IOAPICs */ + for(i = 0; i < 2; i++) { + if (dev = dev_find_device(PCI_VENDOR_ID_AMD, 0x7451, dev)){ + ACPI_WRITE_MADT_IOAPIC(dev, ioapic_nr); + ioapic_nr++; + } + } + + /* The doughter card may contain either 8131 or 8132 */ + + /* Write the 8132 IOAPICs if they exist */ + for(i = 0; i < 4; i++) { + if (dev = dev_find_device(PCI_VENDOR_ID_AMD, 0x7459, dev)){ + ACPI_WRITE_MADT_IOAPIC(dev, ioapic_nr); + ioapic_nr++; + } + } + + /* In the event there were no 8132s look for the 8131s + * but skip the two onboard 8131 + */ + dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7451, 0); + dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7451, dev); + /* Write all 8131 IOAPICs */ while((dev = dev_find_device(PCI_VENDOR_ID_AMD, 0x7451, dev))) { ACPI_WRITE_MADT_IOAPIC(dev, ioapic_nr); @@ -83,6 +107,7 @@ void acpi_create_lnxb(acpi_lnxb_t *lnxb) /* first skip the onboard 8131 */ dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7450, 0); dev=dev_find_device(PCI_VENDOR_ID_AMD, 0x7450, dev); + /* now look at the last 8131 in each chain, * as it contains the valid bus ranges */ diff --git a/src/mainboard/agami/aruma/auto.c b/src/mainboard/agami/aruma/auto.c index d5a3591305..a522174932 100644 --- a/src/mainboard/agami/aruma/auto.c +++ b/src/mainboard/agami/aruma/auto.c @@ -32,8 +32,9 @@ static void hard_reset(void) { set_bios_reset(); - pci_write_config8(PCI_DEV(0, 0x04, 3), 0x41, 0xf1); - outb(0x0e, 0x0cf9); + // pci_write_config8(PCI_DEV(0, 0x04, 3), 0x41, 0xf1); + // outb(0x0e, 0x0cf9); + outb(0x06, 0x0cf9); /* this value will assert RESET_L and LDTRST_L */ } static void soft_reset(void) diff --git a/src/mainboard/agami/aruma/fadt.c b/src/mainboard/agami/aruma/fadt.c index 74e454d903..934195690c 100644 --- a/src/mainboard/agami/aruma/fadt.c +++ b/src/mainboard/agami/aruma/fadt.c @@ -71,7 +71,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs,void *dsdt){ fadt->reset_reg.addrl = 0xcf9; fadt->reset_reg.addrh = 0x0; - fadt->reset_value = 6; + fadt->reset_value = 0x06; fadt->x_firmware_ctl_l = facs; fadt->x_firmware_ctl_h = 0; fadt->x_dsdt_l = dsdt; diff --git a/src/southbridge/amd/amd8111/amd8111_acpi.c b/src/southbridge/amd/amd8111/amd8111_acpi.c index f661ab478e..4177041c16 100644 --- a/src/southbridge/amd/amd8111/amd8111_acpi.c +++ b/src/southbridge/amd/amd8111/amd8111_acpi.c @@ -97,6 +97,16 @@ static void acpi_init(struct device *dev) #endif + /* To enable the register 0xcf9 in the IO space + * bit [D5] is set in the amd8111 configuration register. + * The config. reg. is devBx41. Register 0xcf9 allows + * hard reset capability to the system. For the ACPI + * reset.reg values in fadt.c to work this register + * must be enabled. + */ + byte = pci_read_config8(dev, 0x41); + pci_write_config8(dev, 0x41, byte | (1<<6)|(1<<5)); + /* power on after power fail */ on = MAINBOARD_POWER_ON_AFTER_POWER_FAIL; get_option(&on, "power_on_after_fail");