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Fix all build problems on PPC except the _SDA_BASE issues caused by the 

code expecting too old binutils(?).

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4007 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2009-03-15 10:04:41 +00:00 committed by Stefan Reinauer
parent 8f556be766
commit 6d07c932bb
6 changed files with 15 additions and 11 deletions
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2
src/arch/ppc/include/arch/pci_ops.h
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@ -1,6 +1,6 @@
#ifndef ARCH_PPC_PCI_OPS_H #ifndef ARCH_PPC_PCI_OPS_H
#define ARCH_PPC_PCI_OPS_H #define ARCH_PPC_PCI_OPS_H
const struct pci_bus_operations pci_ppc_conf1; extern const struct pci_bus_operations pci_ppc_conf1;
#endif /* ARCH_PPC_PCI_OPS_H */ #endif /* ARCH_PPC_PCI_OPS_H */

12
src/arch/ppc/include/arch/pciconf.h
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@ -4,12 +4,12 @@
/* /*
* Direct access to PCI hardware... * Direct access to PCI hardware...
*/ */
extern uint8_t pci_ppc_read_config8(unsigned char, int, int); uint8_t pci_ppc_read_config8(unsigned char, int, int);
extern uint16_t pci_ppc_read_config16(unsigned char, int, int); uint16_t pci_ppc_read_config16(unsigned char, int, int);
extern uint32_t pci_ppc_read_config32(unsigned char, int, int); uint32_t pci_ppc_read_config32(unsigned char, int, int);
extern int pci_ppc_write_config8(unsigned char, int, int, uint8_t); int pci_ppc_write_config8(unsigned char, int, int, uint8_t);
extern int pci_ppc_write_config16(unsigned char, int, int, uint16_t); int pci_ppc_write_config16(unsigned char, int, int, uint16_t);
extern int pci_ppc_write_config32(unsigned char, int, int, uint32_t); int pci_ppc_write_config32(unsigned char, int, int, uint32_t);
#define CONFIG_CMD(bus,devfn,where) \ #define CONFIG_CMD(bus,devfn,where) \
((bus << 16) | (devfn << 8) | (where & ~3) | 0x80000000) ((bus << 16) | (devfn << 8) | (where & ~3) | 0x80000000)

8
src/include/boot/elf.h
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@ -389,10 +389,12 @@ typedef Elf64_Ehdr Elf_ehdr;
typedef Elf64_Phdr Elf_phdr; typedef Elf64_Phdr Elf_phdr;
#endif #endif
extern int elf_check_arch(Elf_ehdr *ehdr); int elf_check_arch(Elf_ehdr *ehdr);
extern void jmp_to_elf_entry(void *entry, unsigned long buffer); void jmp_to_elf_entry(void *entry, unsigned long buffer);
struct lb_memory; struct lb_memory;
extern int elfboot(struct lb_memory *mem); int elfboot(struct lb_memory *mem);
/* Temporary compile fix, FILO should be dropped from coreboot */
int filo(struct lb_memory *mem);
#define FIRMWARE_TYPE "coreboot" #define FIRMWARE_TYPE "coreboot"
#define BOOTLOADER "elfboot" #define BOOTLOADER "elfboot"

1
src/mainboard/totalimpact/briq/Options.lb
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@ -11,7 +11,6 @@ uses ISA_MEM_BASE
uses PCIC0_CFGADDR uses PCIC0_CFGADDR
uses PCIC0_CFGDATA uses PCIC0_CFGDATA
uses _IO_BASE uses _IO_BASE
uses CROSS_COMPILE
uses HAVE_OPTION_TABLE uses HAVE_OPTION_TABLE
uses CONFIG_COMPRESS uses CONFIG_COMPRESS
uses DEFAULT_CONSOLE_LOGLEVEL uses DEFAULT_CONSOLE_LOGLEVEL

1
src/mainboard/totalimpact/briq/init.c
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@ -28,6 +28,7 @@
#include <ppc.h> #include <ppc.h>
#include <arch/io.h> #include <arch/io.h>
#include <console/console.h> #include <console/console.h>
#include <uart8250.h>
void void
board_init(void) board_init(void)

2
src/northbridge/ibm/cpc710/cpc710_pci.c
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@ -1,5 +1,7 @@
#include <stdint.h> #include <stdint.h>
#include <arch/io.h> #include <arch/io.h>
#include <arch/pciconf.h>
#include <delay.h>
#include "cpc710.h" #include "cpc710.h"
#include "cpc710_pci.h" #include "cpc710_pci.h"