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southbridge/intel/bd82x6x native usb init: replace some magic values 

Some magic numbers are documented in the PCH datasheet so use them.

Change-Id: I15b58ff99b3bc11ac437e5ea74f4f01b7c02032a
Signed-off-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-on: http://review.coreboot.org/8307
Tested-by: build bot (Jenkins)
Reviewed-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Nicolas Reinecke 2015-01-29 15:48:27 +01:00 committed by Kyösti Mälkki
parent 266971c1cd
commit 6d1158f3a9
2 changed files with 10 additions and 4 deletions
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6
src/southbridge/intel/bd82x6x/early_usb_native.c
View File

@ -56,17 +56,17 @@ early_usb_init (const struct southbridge_usb_port *portmap)
for (i = 0; i < 14; i++)
if (!portmap[i].enabled)
reg32 |= (1 << i);
write32 (DEFAULT_RCBABASE | 0x359c, reg32);
write32 (DEFAULT_RCBABASE | USBPDO, reg32);
reg32 = 0;
for (i = 0; i < 8; i++)
if (portmap[i].enabled && portmap[i].oc_pin >= 0)
reg32 |= (1 << (i + 8 * portmap[i].oc_pin));
write32 (DEFAULT_RCBABASE | 0x35a0, reg32);
write32 (DEFAULT_RCBABASE | USBOCM1, reg32);
reg32 = 0;
for (i = 8; i < 14; i++)
if (portmap[i].enabled && portmap[i].oc_pin >= 4)
reg32 |= (1 << (i - 8 + 8 * (portmap[i].oc_pin - 4)));
write32 (DEFAULT_RCBABASE | 0x35a4, reg32);
write32 (DEFAULT_RCBABASE | USBOCM2, reg32);
for (i = 0; i < 22; i++)
write32 (DEFAULT_RCBABASE | (0x35a8 + 4 * i), 0);

6
src/southbridge/intel/bd82x6x/pch.h
View File

@ -438,6 +438,12 @@ early_usb_init (const struct southbridge_usb_port *portmap);
#define PCH_DISABLE_MEI1 (1 << 1)
#define PCH_ENABLE_DBDF (1 << 0)
/* USB Port Disable Override */
#define USBPDO 0x359c /* 32bit */
/* USB Overcurrent MAP Register */
#define USBOCM1 0x35a0 /* 32bit */
#define USBOCM2 0x35a4 /* 32bit */
/* ICH7 GPIOBASE */
#define GPIO_USE_SEL 0x00
#define GP_IO_SEL 0x04