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soc/intel/cannonlake: Switch to runtime generation of Intel Power Engine 

The pep.asl file is being obsoleted by runtime generation, therefore
switch cannonlake boards to this method.

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Ic5343b0fd37eafac29a23846c8cfc3ca93d1821d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56010
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Tim Wawrzynczak 2021-07-01 08:42:01 -06:00
parent bd5b4aa683
commit 6d44437ec1
3 changed files with 11 additions and 3 deletions
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1
src/soc/intel/cannonlake/Kconfig
View File

@ -80,6 +80,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_ACPI_CPPC select SOC_INTEL_COMMON_BLOCK_ACPI_CPPC
select SOC_INTEL_COMMON_BLOCK_ACPI_GPIO select SOC_INTEL_COMMON_BLOCK_ACPI_GPIO
select SOC_INTEL_COMMON_BLOCK_ACPI_LPIT select SOC_INTEL_COMMON_BLOCK_ACPI_LPIT
select SOC_INTEL_COMMON_BLOCK_ACPI_PEP
select SOC_INTEL_COMMON_BLOCK_CAR select SOC_INTEL_COMMON_BLOCK_CAR
select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
select SOC_INTEL_COMMON_BLOCK_CNVI select SOC_INTEL_COMMON_BLOCK_CNVI

3
src/soc/intel/cannonlake/acpi/southbridge.asl
View File

@ -39,6 +39,3 @@
/* GbE 0:1f.6 */ /* GbE 0:1f.6 */
#include <soc/intel/common/block/acpi/acpi/pch_glan.asl> #include <soc/intel/common/block/acpi/acpi/pch_glan.asl>
/* Intel Power Engine Plug-in */
#include <soc/intel/common/block/acpi/acpi/pep.asl>

10
src/soc/intel/cannonlake/pmc.c
View File

@ -4,6 +4,7 @@
#include <console/console.h> #include <console/console.h>
#include <device/mmio.h> #include <device/mmio.h>
#include <device/device.h> #include <device/device.h>
#include <intelblocks/acpi.h>
#include <intelblocks/pmc.h> #include <intelblocks/pmc.h>
#include <intelblocks/pmclib.h> #include <intelblocks/pmclib.h>
#include <intelblocks/rtc.h> #include <intelblocks/rtc.h>
@ -119,10 +120,19 @@ static void soc_acpi_mode_init(struct device *dev)
pmc_set_acpi_mode(); pmc_set_acpi_mode();
} }
static void pmc_fill_ssdt(const struct device *dev)
{
if (CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_PEP))
generate_acpi_power_engine();
}
struct device_operations pmc_ops = { struct device_operations pmc_ops = {
.read_resources = soc_pmc_read_resources, .read_resources = soc_pmc_read_resources,
.set_resources = noop_set_resources, .set_resources = noop_set_resources,
.init = soc_acpi_mode_init, .init = soc_acpi_mode_init,
.enable = pmc_init, .enable = pmc_init,
#if CONFIG(HAVE_ACPI_TABLES)
.acpi_fill_ssdt = pmc_fill_ssdt,
#endif
.scan_bus = scan_static_bus, .scan_bus = scan_static_bus,
}; };