cpu/allwinner/a10: Add minimal ramstage driver

Change-Id: I857755976b17b0e492c086162f395a77933eeed8
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/4698
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Alexandru Gagniuc 2014-01-03 04:24:35 -05:00
parent 3ccb3ce415
commit 6d51f5dfe9
5 changed files with 110 additions and 0 deletions

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@ -8,6 +8,7 @@ bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart_console.c
romstage-y += bootblock_media.c
romstage-y += cbmem.c
romstage-y += clock.c
romstage-y += pinmux.c
romstage-y += timer.c
@ -16,7 +17,9 @@ romstage-y += uart.c
romstage-y += uart_console.c
ramstage-y += bootblock_media.c
ramstage-y += cbmem.c
ramstage-y += clock.c
ramstage-y += cpu.c
ramstage-y += monotonic_timer.c
ramstage-y += timer.c
ramstage-y += twi.c

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@ -0,0 +1,18 @@
/*
* Provides cbmem utilities for romstage and ramstage
*
* Copyright (C) 2013 Alexandru Gagniuc <mr.nuke.me@gmail.com>
* Subject to the GNU GPL v2, or (at your option) any later version.
*/
#include "ram_segs.h"
#include <cbmem.h>
#if IS_ENABLED(CONFIG_DYNAMIC_CBMEM)
void *cbmem_top(void)
{
return a1x_get_cbmem_top();
}
#endif

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@ -0,0 +1,11 @@
/*
* Allwinnwer A10 devicetree config struct
*
* Copyright (C) 2013 Alexandru Gagniuc <mr.nuke.me@gmail.com>
* Subject to the GNU GPL v2, or (at your option) any later version.
*/
#include <types.h>
struct cpu_allwinner_a10_config {
};

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@ -0,0 +1,48 @@
/*
* Ramstage initialization for Allwinner CPUs
*
* Copyright (C) 2014 Alexandru Gagniuc <mr.nuke.me@gmail.com>
* Subject to the GNU GPL v2, or (at your option) any later version.
*/
#include <console/console.h>
#include <device/device.h>
#include <cpu/cpu.h>
#include <cbmem.h>
static void cpu_enable_resources(device_t dev)
{
ram_resource(dev, 0, CONFIG_SYS_SDRAM_BASE >> 10,
CONFIG_DRAM_SIZE_MB << 10);
/* TODO: Declare CBFS cache as reserved? There's no guarantee we won't
* overwrite it. It seems to stay intact, being so high in RAM
*/
}
static void cpu_init(device_t dev)
{
/* TODO: Check if anything else needs to be explicitly initialized */
}
static void cpu_noop(device_t dev)
{
}
static struct device_operations cpu_ops = {
.read_resources = cpu_noop,
.set_resources = cpu_noop,
.enable_resources = cpu_enable_resources,
.init = cpu_init,
.scan_bus = NULL,
};
static void a1x_cpu_enable_dev(device_t dev)
{
dev->ops = &cpu_ops;
}
struct chip_operations cpu_allwinner_a10_ops = {
CHIP_NAME("CPU Allwinner A10")
.enable_dev = a1x_cpu_enable_dev,
};

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@ -0,0 +1,30 @@
/*
* How we use DRAM on Allwinner CPUs
*
* Copyright (C) 2014 Alexandru Gagniuc <mr.nuke.me@gmail.com>
* Subject to the GNU GPL v2, or (at your option) any later version.
*/
#include <config.h>
/*
* Put CBMEM at top of RAM
*/
static inline void *a1x_get_cbmem_top(void)
{
return (void *)CONFIG_SYS_SDRAM_BASE + (CONFIG_DRAM_SIZE_MB << 20);
}
/*
* By CBFS cache, we mean a cached copy, in RAM, of the entire CBFS region.
*/
static inline void *a1x_get_cbfs_cache_top(void)
{
/* Arbitrary 16 MiB gap for cbmem tables and bouncebuffer */
return a1x_get_cbmem_top() - (16 << 20);
}
static inline void *a1x_get_cbfs_cache_base(void)
{
return a1x_get_cbfs_cache_top() - CONFIG_ROM_SIZE;
}