cpu/allwinner/a10: Add minimal ramstage driver
Change-Id: I857755976b17b0e492c086162f395a77933eeed8 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4698 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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@ -8,6 +8,7 @@ bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart_console.c
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romstage-y += bootblock_media.c
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romstage-y += cbmem.c
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romstage-y += clock.c
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romstage-y += pinmux.c
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romstage-y += timer.c
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@ -16,7 +17,9 @@ romstage-y += uart.c
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romstage-y += uart_console.c
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ramstage-y += bootblock_media.c
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ramstage-y += cbmem.c
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ramstage-y += clock.c
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ramstage-y += cpu.c
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ramstage-y += monotonic_timer.c
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ramstage-y += timer.c
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ramstage-y += twi.c
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@ -0,0 +1,18 @@
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/*
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* Provides cbmem utilities for romstage and ramstage
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*
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* Copyright (C) 2013 Alexandru Gagniuc <mr.nuke.me@gmail.com>
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* Subject to the GNU GPL v2, or (at your option) any later version.
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*/
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#include "ram_segs.h"
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#include <cbmem.h>
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#if IS_ENABLED(CONFIG_DYNAMIC_CBMEM)
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void *cbmem_top(void)
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{
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return a1x_get_cbmem_top();
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}
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#endif
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@ -0,0 +1,11 @@
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/*
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* Allwinnwer A10 devicetree config struct
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*
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* Copyright (C) 2013 Alexandru Gagniuc <mr.nuke.me@gmail.com>
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* Subject to the GNU GPL v2, or (at your option) any later version.
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*/
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#include <types.h>
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struct cpu_allwinner_a10_config {
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};
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@ -0,0 +1,48 @@
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/*
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* Ramstage initialization for Allwinner CPUs
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*
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* Copyright (C) 2014 Alexandru Gagniuc <mr.nuke.me@gmail.com>
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* Subject to the GNU GPL v2, or (at your option) any later version.
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <cpu/cpu.h>
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#include <cbmem.h>
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static void cpu_enable_resources(device_t dev)
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{
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ram_resource(dev, 0, CONFIG_SYS_SDRAM_BASE >> 10,
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CONFIG_DRAM_SIZE_MB << 10);
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/* TODO: Declare CBFS cache as reserved? There's no guarantee we won't
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* overwrite it. It seems to stay intact, being so high in RAM
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*/
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}
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static void cpu_init(device_t dev)
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{
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/* TODO: Check if anything else needs to be explicitly initialized */
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}
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static void cpu_noop(device_t dev)
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{
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}
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static struct device_operations cpu_ops = {
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.read_resources = cpu_noop,
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.set_resources = cpu_noop,
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.enable_resources = cpu_enable_resources,
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.init = cpu_init,
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.scan_bus = NULL,
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};
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static void a1x_cpu_enable_dev(device_t dev)
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{
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dev->ops = &cpu_ops;
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}
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struct chip_operations cpu_allwinner_a10_ops = {
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CHIP_NAME("CPU Allwinner A10")
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.enable_dev = a1x_cpu_enable_dev,
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};
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@ -0,0 +1,30 @@
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/*
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* How we use DRAM on Allwinner CPUs
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*
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* Copyright (C) 2014 Alexandru Gagniuc <mr.nuke.me@gmail.com>
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* Subject to the GNU GPL v2, or (at your option) any later version.
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*/
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#include <config.h>
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/*
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* Put CBMEM at top of RAM
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*/
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static inline void *a1x_get_cbmem_top(void)
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{
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return (void *)CONFIG_SYS_SDRAM_BASE + (CONFIG_DRAM_SIZE_MB << 20);
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}
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/*
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* By CBFS cache, we mean a cached copy, in RAM, of the entire CBFS region.
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*/
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static inline void *a1x_get_cbfs_cache_top(void)
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{
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/* Arbitrary 16 MiB gap for cbmem tables and bouncebuffer */
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return a1x_get_cbmem_top() - (16 << 20);
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}
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static inline void *a1x_get_cbfs_cache_base(void)
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{
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return a1x_get_cbfs_cache_top() - CONFIG_ROM_SIZE;
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}
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