Add Intel Socket LGA771

Change-Id: Iee7d3ff2884d8c43ff1af498160589e551bc9cc8
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/492
Tested-by: build bot (Jenkins)

src/cpu/intel/Kconfig

@@ -28,3 +28,4 @@ source src/cpu/intel/socket_mPGA603/Kconfig
 source src/cpu/intel/socket_mPGA604/Kconfig
 source src/cpu/intel/socket_PGA370/Kconfig
 source src/cpu/intel/socket_441/Kconfig
+source src/cpu/intel/socket_LGA771/Kconfig

src/cpu/intel/Makefile.inc

@@ -16,6 +16,7 @@ subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA604) += socket_mPGA604
 subdirs-$(CONFIG_CPU_INTEL_SOCKET_PGA370) += socket_PGA370
 subdirs-$(CONFIG_CPU_INTEL_SLOT_2) += slot_2
 subdirs-$(CONFIG_CPU_INTEL_SLOT_1) += slot_1
+subdirs-$(CONFIG_CPU_INTEL_SOCKET_LGA771) += socket_LGA771
 
 #socket_mPGA604_533Mhz
 #socket_mPGA604_800Mhz

src/cpu/intel/socket_LGA771/Kconfig

@@ -0,0 +1,7 @@
+config CPU_INTEL_SOCKET_LGA771
+	bool
+        select CPU_INTEL_MODEL_6FX
+        select CPU_INTEL_CORE2
+	select SSE2
+	select MMX
+	select AP_IN_SIPI_WAIT

src/cpu/intel/socket_LGA771/Makefile.inc

@@ -0,0 +1,11 @@
+ramstage-y += socket_LGA771.c
+subdirs-y += ../model_6ex
+subdirs-y += ../model_6fx
+subdirs-y += ../../x86/tsc
+subdirs-y += ../../x86/mtrr
+subdirs-y += ../../x86/lapic
+subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/smm
+subdirs-y += ../microcode
+subdirs-y += ../hyperthreading
+

src/cpu/intel/socket_LGA771/chip.h

@@ -0,0 +1,4 @@
+extern struct chip_operations cpu_intel_socket_LGA771_ops;
+
+struct cpu_intel_socket_LGA771_config {
+};

src/cpu/intel/socket_LGA771/socket_LGA771.c

@@ -0,0 +1,7 @@
+#include <device/device.h>
+#include "chip.h"
+
+
+struct chip_operations cpu_intel_socket_LGA771_ops = {
+	CHIP_NAME("Socket LGA771 CPU")
+};